Design & Reuse
arrow AES Encryption Core (92)
arrow Cryptography (160)
arrow Data Integrity - Error Correction (21)
arrow Embedded Security Modules (18)
arrow Hardware Accelerator (45)
arrow MACsec, IPsec (32)
arrow Post-Quantum Solutions (27)
arrow PUF Based (22)
arrow Random Number Generator (RNG) (19)
arrow Root of Trust (17)
arrow Security Platform (30)
arrow Sensors & Monitors (12)
495 IP
251
1.0
SHA256 & SHA224 core
The eSi-SHA256 core is an easy to use SHA hash accelerator peripheral for both SHA256 and SHA224. This is a cryptographic hash function designed by t...
252
1.0
enhanced AES
FIPS-197 Compliant. Encrypt and decrypt modules with 128, 192 and 256 bit keys. Various versions are available, from small area to high performance, u...
253
1.0
Enhanced AES with CCM mode
FIPS-197 Compliant. Encrypt and decrypt modules with 128, 192 and 256 bit keys. Various versions are available, from small area to high performance, u...
254
1.0
Power and area optimised Bitcoin miner engine
The eSi-BTC core is a Bitcoin miner engine that perform double SHA256 Hash. It is design to deliver best in class silicon area and power for the next...
255
1.0
GPON FEC 2.5 Gbps
This high performance core is a full featured Forward Error Correction encoder and decoder, specially designed for high speed optical networks or any ...
256
1.0
nQrux® Confidential Computing Engine (CCE)
nQrux® Confidential Computing Engine (CCE) offers customisable solutions protecting data, code execution, and AI (Artificial Intelligence) models in d...
257
1.0
RSA public key cryptography with APB interface
The standard RSA module is available as an APB peripheral, where it seamlessly integrates with EnSilica's cryptography library. The peripheral can ...
258
1.0
PUF-based Hardware Root of Trust
PUFrt is a Hardware Root of Trust (HRoT) offering the essential features necessary for establishing a trusted foundation from which all security opera...
259
1.0
Cypher Processor IP
Vivante’s CYP800 (CYPher) Processor IP encryption and decryption fabric provides a unified data encryption and decryption infrastructure for the SoC....
260
0.0
1.6T/3.2T Multi-Channel MACsec Engine with TDM Interface
The MACsec-IP-364 is a MACsec/IPsec engine developed specifically for high-speed, multi-rate and multi-port Ethernet devices. Its architecture provide...
261
0.0
G.hn AES-CCM Core
Implementation of the new ITU G.9961 standard for home networking requires the NIST standard AES cipher in CTR and CBC modes (a.k.a. CCM) for encrypti...
262
0.0
400G AES Encryption Core
The 400G AES Encryption Core is a high performance and yet low footprint AES engine for 400G/s application. Typical applications are providing bulk en...
263
0.0
800G Channelized Ethernet MACsec IP
The Rianta Solutions MACsec IP cores are best-in-class, fully-featured 1G to 800G channelized MACsec streaming processor cores supporting both LAN and...
264
0.0
10G/25G/40G/50G AES Encryption Core
The 10G/25G/40G/50G AES Encryption Core is a high performance and yet low footprint AES engine for 10G/s - 50G/s application. Typical applications are...
265
0.0
P1619/802.1ae (MACSec) GCM/XEX/XTS-AES Core
General Description LAN security standard IEEE 802.1ae (MACSec) uses AES cipher in the GCM mode, while the disk/tape encryption standard IEEE P1619 us...
266
0.0
13 Different Cryptographic Hash Functions Core
These are 13 different cryptographic hash function originally submitted to NIST hash function competition which made upto round 2. All of these cores ...
267
0.0
MACsec - Balanced - Security Protocol
MACsec is a point-to-point protocol located on layer two (Data Link) of the OSI model. Xiphera's comprehensive MACsec solution portfolio safeguards th...
268
0.0
MACsec - High-speed - Security Protocol
MACsec is a point-to-point protocol located on layer two (Data Link) of the OSI model. Xiphera's comprehensive MACsec solution portfolio safeguards th...
269
0.0
MACsec software toolkit
INSIDE Secure provides a complete MACsec solution to secure Ethernet through its MACsec software toolkit and family of SafeXcel Hardware IP MACsec Sec...
270
0.0
RADIX-M Emulation Based Security Verification
Radix-M provides SoC system level hardware security verification leveraging commercial emulators for firmware and hardware security validation. By run...
271
0.0
RADIX-S - Simulation Based Security Verification
Radix-S is used during design creation and verification to detect and remediate security issues in IP blocks and subsystems of an SoC. Its advanced i...
272
0.0
Walnut DSA (TM) Fast, Future-Proof Digital Signature Algorithm Designed for Low-Resource Devices
WalnutDSA™ is a fast, small footprint, future-proof, public-key digital signature solution for low-resource devices–running on 8-, 16-, an...
273
0.0
Camellia Crypto Accelerator
The Camellia Engine implements the Camellia crypto algorithm, as specified in “Specification of Camellia” and RFC3713. Designed for fast integration...
274
0.0
Hardened 128-bit Advanced Encryption Standard (AES) coprocessor
The AES Coprocessor encrypts and decrypts 128-bit data blocks by computing an AES algorithm with a 128, 192 or 256-bit key through a highly secure arc...
275
0.0
Hardware accelerator for RSA, DSA, Diffie-Hellman, El-Gamal and Elliptic Curves algorithms
The Public Key Cryptographic Coprocessor (PK2C) is a hardware accelerator intended to speed-up the core functions of public-key cryptography algorithm...
276
0.0
HASH Accelerator with SHA-3, SHA-2, SHA-1
The EIP-57 is the IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SH...
277
0.0
Hash-based DRBG library compliant with the NIST SP 800-90A standard
The software Deterministic Random Bit Generator (DRBG) is a Hash-based library compliant with the NIST SP 800-90A standard....
278
0.0
Fast, Compact, Ultra-Low-Power Cryptographic Tools
Quickly and easily embed our fast, small-footprint, ultra-low-power cryptographic solutions in your IoT devices. Our hardware and software development...
279
0.0
KASUMI Engine
As part of Rambus' award-winning silicon Intellectual Property (IP) product portfolio, the EIP-06 KASUMI Engine implement the Specification of the 3GP...
280
0.0
Java Card compliant cryptographic library for encryption and decryption of RSA, DSA, Diffie-Hellman, El-Gamal and Elliptic Curves algorithms
The Public Key Cryptographic Library (PKCL) provides standardized key computation, encryption, decryption, signature and verification functionalities ...
281
0.0
ECC Core
Rambus Error Correction Coding (ECC) Core implements the standard Hamming Code based DRAM Single Error Correction (SEC) and Double Error Detection (DE...
282
0.0
MD5 Hashing Core
The es1005 hash fully implements the MD5 (Message Digest Algorithm RFC 1321). The core can be used for data authentication in digital broadband, wire...
283
0.0
MD5 Message-Digest Algorithm
The MD5 core from Alma Technologies is a high-performance implementation of the MD5 Message-Digest algorithm, a one-way hash function, compliant to th...
284
0.0
HDCP 2.0 Encryption Suite
HDCP Suite consists of hardware and software components implementing the HDCP 2.0 protocol. The hardware components are fully synchronous and availabl...
285
0.0
HDCP 2.x Receiver IP
SmartDV’s HDCP (High-bandwidth Digital Content Protection) 2.x Receiver IP is a silicon-proven solution that ensures secure, high-bandwidth transmissi...
286
0.0
HDCP 2.x Transmitter IP
SmartDV’s HDCP 2.x Transmitter IP is a silicon-proven solution built to deliver secure transmission of ultra-high-definition content across HDMI, Disp...
287
0.0
HDCP Encryption-Decryption Engine
The Trilinear Technologies High-bandwidth Digital Content Protection (HDCP) Encryption-Decryption Engine IP core allows system designers to accelerate...
288
0.0
HDCP Engine
The EIP-116 High-bandwidth Digital Content Protection Control Path module provides the required technology for implementing all the secure access, cry...
289
0.0
HDMI 2.1 Forward Error Correction (FEC) Receiver
The HDMI Forward Error Correction (FEC) Receiver IP Core implements Reed-Solomon FEC and symbol de-interleaving/de-mapping as specified by the HDMI 2....
290
0.0
HDMI 2.1 Forward Error Correction (FEC) Transmitter
The HDMI Forward Error Correction (FEC) Transmitter IP Core implements Reed-Solomon FEC and symbol mapping/interleaving as specified by the HDMI 2.1 ...
291
0.0
Advanced DPA- and FIA-resistant FortiCrypt AES SW library
Intro The FortiCrypt software library provides ultra-strong protection against SCA and FIA while preserving exceptional performance enabling encrypti...
292
0.0
Advanced DPA- and FIA-resistant FortiMac HMAC SHA2 IP core
Intro The HMAC-SHA2-DPA-FIA IP core belongs to the FortiMac product family. Like all the FortiMac product family members, this IP provides ultra-stron...
293
0.0
Advanced DPA- and FIA-resistant FortiMac HMAC SHA2 SW library
Intro The FortiMac library belongs to the FortiMac product family. This software library provides ultra-strong protection against SCA, FIA, and cache ...
294
0.0
Advanced Encryption Standard (AES) Engine
ParaQum Technologies® advanced Encryption Standard (AES) engine is a highly configurable and multipurpose encryption/decryption engine. The AES en...
295
0.0
Advanced Encryption Standard (AES) IP core 128/192/256
VISENGI’s Advanced Encryption Standard (AES) IP core provides AES-128, AES-192, and AES-256 encryption and decryption, as per FIPS-197, with a s...
296
0.0
Advanced Encryption Standard compliant with FIPS 197
AES bridge, a cryptographic coprocessor that complies with FIPS 197 Advanced Encryption Standard, employs the Rijndael encryption method to link APB, ...
297
0.0
IEC 61850/62351 Substation Automation Systems Cryptographic IP Core
IEC 61850/62351 Substation Automation Systems Cryptographic (SASCrypt) IP Core secures the strict real-time traffic used in the Substation Automation ...
298
0.0
FEC RS (198,194) Decoder IP
FEC RS (198,194) Decoder core is compliant with standard VESA DisplayPort version 2.0. Through its compatibility, it provides a simple interface to a ...
299
0.0
FEC RS (198,194) Encoder IP
FEC RS (198,194) Encoder core is compliant with standard VESA DisplayPort version 2.0. Through its compatibility, it provides a simple interface to a ...
300
0.0
FEC RS (254,250) Decoder IP
FEC RS (254,250) Decoder core is compliant with standard VESA DisplayPort version 1.4/2.0. Through its compatibility, it provides a simple interface t...