51 2.0

3.3V 32kHz RTC, 50MHz Low Power Oscillator, and Programmable 100MHz Oscillator Pad Set The Oscillators library provides oscillators for on-chip asynchronous clock generation with an appropriate external crystal. This library is offered a...

52 3.0

Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k Dual Port SRAM compiler - TSMC 40 nm uLP - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k...

53 2.0

LVDS I/O Pad Set The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...

54 2.0

ONFI_4 IO Pad Set The ONFI 4.1 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...

55 2.0

SD 3.0 I/O Pad Set The SD library provides the driver / receiver cell for SD 3.0 signaling. The library is compliant with the SD Specifications, Part 1, Physical Layer S...

56 2.0

CML I/O Pad Set The CML library provides a differential clock driver, a voltage reference, and power cells to support REFCLK signaling for PCIe applications....

57 2.0

I2C I/O Pad Set The I2C libraries provide the bidirectional I/O for two-line serial communication per Rev. 4 of the I2Cbus industry specification. The design is compa...

58 2.0

3.3V GPIO: Fault Tolerant The 3.3V Fault-Tolerant General Purpose I/O libraries provide programmable, multi-voltage bidirectional I/O’s that give the system designer the flexib...

59 2.0

1.8V Programmable 100MHz Oscillator I/O Pad Set The Oscillators library provides a programmable oscillator for on-chip asynchronous clock generation with an appropriate external crystal. This oscil...

60 2.0

7 way DDR combo The LPDDR2/3_DDR3/4 libraries contain the 7-way combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and the ...

61 2.0

CML I/O Pad Set The CML library provides a differential current mode logic clock driver to support REFCLK signaling in PCIe applications along with a CML voltage refe...

62 2.0

I2C I/O Pad Set The I2C library provides open-drain bi-directional I/O cells designed for the I2C two-line interface. It is compliant with the I2C-bus specification –...

63 0.0

6 track High Density standard cell library at TSMC 180 nm TSMC 180 G, SESAME HD provides the best trade-off between area and power achieved from an innovative cell design enabling 6-track cells....

64 2.0

1.8V Power Support I/O Pad Set The 1.8V Support: Power library provides a full complement of cells to support the assembly of a complete pad ring by abutment. It is supplied as a st...

65 2.0

1.8V Programmable 100MHz Oscillator I/O Pad Set The Oscillators library provides a programmable oscillator for on-chip asynchronous clock generation with an appropriate external crystal. This oscil...

66 2.0

3.3V 100 MHz Oscillator I/O Pad Set The 1.8V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along with corner and spa...

67 2.0

3.3V Power Support I/O Pad Set The 3.3V Support: Power library provides a full complement of cells to support the assembly of a complete pad ring by abutment. It is supplied as a st...

68 2.0

ESD Protection The ESD Protection library provides ESD protection components. In addition to core-placeable ESD protection cells, discrete components (RF diodes and ...

69 2.0

I2C IO Pad Set The I2C library provides open-drain bi-directional I/O cells designed for the I2C two-line interface. It is compliant with the I2C-bus specification –...

70 2.0

SMBus IO Pad Set The SMBus library provides open-drain bi-directional I/O cells designed for the High-Power SMBus two-line interface. It is compliant with the Rev 3.1 ...

71 2.0

1.8V General Purpose I/O Inline Pad Set The 1.8V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibili...

72 2.0

1.8V Fault Tolerant General Purpose I/O Staggered Pad Set The 1.8V GPIO FT library provides ultra low leakage general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system d...

73 2.0

1.8V Fault Tolerant General Purpose I/O Inline Pad Set The 1.8V GPIO FT library provides ultra low leakage general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system d...

74 2.0

1.8V General Purpose I/O Staggered Pad Set The 1.8V GPIO FT library provides ultra low leakage general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system d...

75 2.0

1.8V General Purpose I/O Staggered Pad Set The 1.8V GPIO FT library provides ultra low leakage general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system d...

76 2.0

LVDS IO Pad Set The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...

77 2.0

3.3V Fault Tolerant General Purpose I/O Staggered Pad Set The 3.3V GPIO FT library provides general purpose bidirectional I/O cells that are fault tolerant. These programmable, multi-voltage I/O’s give the sy...

78 2.0

3.3V Fault Tolerant General Purpose I/O Inline Pad Set The 3.3V GPIO FT library provides general purpose bidirectional I/O cells that are fault tolerant. These programmable, multi-voltage I/O’s give the sy...

79 2.0

3.3V General Purpose I/O Staggered Pad Set The 3.3V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibili...

80 2.0

3.3V General Purpose I/O Inline Pad Set The 3.3V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibili...

81 2.0

1.8V General Purpose I/O Staggered Pad Set The 1.8V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along with corner and spa...

82 2.0

3.3V Wide-Range General Purpose Inline I/O Pad Set The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along with corner and spa...

83 2.0

1.8V General Purpose Staggered I/O Pad Set The 1.8V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibili...

84 0.0

3.3V Wide-Range General Purpose Inline I/O Pad Set The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog power...

85 0.0

SSTL_15_18 IO Pad Set The SSTL_15/18 pad set is a full complement of I/O, calibration, power, and spacer cells that are necessary to assemble a padring by abutment. Since t...

86 0.0

subLVDS IO Pad Set The LVDS I/O is a three-module design (input, output and reference block). The LDP_OU_450_18V_T is a 1400MBit/s LVDS Driver, LDP_IN_450_18V_DN is a 14...

87 0.0

LVDS IO Pad Set The LVDS I/O is a three-module design (input, output and reference block). The LDP_OU_675_25V_T is a 2GBit/s LVDS Driver, LDP_IN_675_25V_DN is a 2GBit...

88 0.0

2.5V 5V Tolerant GPIO Staggered IO Pad Set The 3.3V General Purpose I/O (5VT) library provides programmable bidirectional I/O’s that are both 5V tolerant and fault tolerant. The I/O’s are prov...

89 0.0

2.5V 5V Tolerant GPIO Inline IO Pad Set The 3.3V General Purpose I/O (5VT) library provides programmable bidirectional I/O’s that are both 5V tolerant and fault tolerant. The I/O’s are prov...

90 0.0

ONFI IO Pad Set The ONFI library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to support bo...

91 0.0

2.5V General Purpose Staggered IO Pad Set A full range of power pads is provided to enable the system designer different options for separate core power (VDD and VSS) and separate I/O padring ...

92 0.0

2.5V General Purpose Inline IO Pad Set A full range of power pads is provided to enable the system designer different options for separate core power (VDD and VSS) and separate I/O padring ...

93 0.0

6 track Ultra High Density standard cell library at TSMC 180 nm TSMC 180 BCD, SESAME uHD for ultra high-density logic design thanks to 6-track cells combined with pulsed latch cells acting as spinner cells (densest...

94 5.0

EverOn Ultra Low Voltage Embedded SRAM TSMC 40ULP sureCore’s EverOn™ Single Port Synchronous Ultra Low Voltage SRAM IP combines high-density foundry bitcells with sureCore’s low-voltage and low-power ...

95 5.0

EverOn Ultra Low Voltage Embedded SRAM TSMC 28HPC+ sureCore’s EverOn™ Single Port Synchronous Ultra Low Voltage SRAM IP combines high-density foundry bitcells with sureCore’s low-voltage and low-power ...

96 7.0

PowerMiser Ultra Low Power Embedded SRAM TSMC 28HPC+ PowerMiser(TM) delivers best-in-class static and dynamic power performance. Its patented “Bit Line Voltage Control” techniques eliminate performance c...

97 5.0

EverOn Ultra Low Voltage Embedded SRAM TSMC 40ULP Embedded Flash sureCore’s EverOn™ Single Port Synchronous Ultra Low Voltage SRAM IP combines high-density foundry bitcells with sureCore’s low-voltage and low-power ...

98 8.0

SureFIT Custom SRAM Design Service Provides a SRAM design service customised to customer specification. SureFIT deploys silicon proven and patented low-power design techniques with powe...

99 5.0

EverOn Ultra Low Voltage Embedded SRAM TSMC 22ULL sureCore’s EverOn™ Single Port Synchronous Ultra Low Voltage SRAM IP combines high-density foundry bitcells with sureCore’s low-voltage and low-power ...

100 7.0

PowerMiser Ultra Low Power Embedded SRAM TSMC 22ULL PowerMiser(TM) delivers best-in-class static and dynamic power performance. Its patented “Bit Line Voltage Control” techniques eliminate performance c...