Design & Reuse
2769 IP
651
0.3729
Via Programmable ROM Compiler with Row/Column Redundancy Option, supports process FFC/FFC+
Specialty Memory Solutions...
652
0.3729
Ternary-CAM/Binary-CAM, supports process FF+GL/FF+LL/FFC
Specialty Memory Solutions...
653
0.3729
Dual Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF+GL/FF+LL/FFC
Memory Compilers...
654
0.3729
Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF+GL/FF+LL/FFC
Memory Compilers...
655
0.3729
MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF+GL/FF+LL/FFC
Memory Compilers...
656
0.3729
Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, write assist, supports process FF+GL/FF+LL/FFC
Memory Compilers...
657
0.3729
One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF+GL/FF+LL/FFC
Memory Compilers...
658
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF+GL/FF+LL/FFC
Memory Compilers...
659
0.3729
Via Programmable ROM Compiler with Row/Column Redundancy Option, supports process FF+GL/FF+LL/FFC
Specialty Memory Solutions...
660
0.3729
Ultra Low Leakage/Ultra Low Power Ternary-CAM/Binary-CAM, supports process ULL/ULP
Specialty Memory Solutions...
661
3.0
Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
Single Port Register File compiler - TSMC 55 nm LP - Memory optimized for high density and high speed - compiler range up to 40 k...
662
0.3729
Ultra Low Leakage/Ultra Low Power Dual Port SRAM Compiler with Row/Column Redundancy Option, with write assist, supports process ULL/ULP
Memory Compilers...
663
0.3729
Ultra Low Leakage/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with read assist, write assist, supports process ULL/ULP
Memory Compilers...
664
0.3729
Ultra Low Leakage/Ultra Low Power MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, read assist, write assist, supports process ULL/ULP
Memory Compilers...
665
0.3729
Ultra Low Leakage/Ultra Low Power Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, read assist, write assist, supports process ULL/ULP
Memory Compilers...
666
0.3729
Ultra Low Leakage/Ultra Low Power One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with write assist, supports process ULL/ULP
Memory Compilers...
667
0.3729
Ultra Low Leakage/Ultra Low Power 2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with write assist, supports process ULL/ULP
Memory Compilers...
668
0.3729
Ultra Low Leakage/Ultra Low Power Via Programmable ROM Compiler with Row/Column Redundancy Option, supports process ULL/ULP
Specialty Memory Solutions...
669
0.3729
High Performance/Low Power/Ultra Low Power Ternary-CAM/Binary-CAM, supports process HP/HPC/HPC+/HPL/HPM/LP/ULP
Specialty Memory Solutions...
670
0.3729
High Performance/Low Power/Ultra Low Power Dual Port SRAM Compiler with Row/Column Redundancy Option, with write assist, supports process HP/HPC/HPC+/HPL/HPM/LP/ULP
Memory Compilers...
671
0.3729
High Performance/Low Power/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with read assist, write assist, supports process HP/HPC/HPC+/HPL/HPM/LP/ULP
Memory Compilers...
672
3.0
Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
Single Port Register File compiler - TSMC 65 nm LP - Memory optimized for high density and high speed - compiler range up to 40 k...
673
0.3729
High Performance/Low Power/Ultra Low Power MultiBank Single Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, read assist, write assist, supports process HP/H
Memory Compilers...
674
0.118
General Purpose IO IP, 3.3V Operations, UMC 0.18um Mixed-Mode process
UMC 0.18um Mixed-Mode / RFCMOS process true 3.3V standard IO Cell Library....
675
0.118
General Purpose IO IP, 3.3V tolerance, UMC 0.25um Logic process
UMC 0.25um Logic process Generic 3.3V Tolerant IO cells....
676
0.118
General Purpose IO IP, 1.8V BOAC EMMC I/O, Support built-in Pull-Up / Pull-Down , UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 1.8V BOAC EMMC IO Cell Library (with customized PU/PD function)....
677
0.118
General Purpose IO IP, UMC 28nm HPM process
UMC 28nm Logic and Mixed-Mode HPM process 1.8V BOAC IO Cell Library....
678
0.118
General Purpose IO IP, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor process 3.3V IO Cell Library....
679
0.118
General Purpose IO IP, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor process 3.3V IO Cell Library....
680
0.118
General Purpose IO IP, 3.3V tolerance, UMC 90nm LL process
UMC 90nm LL/RVT process 3.3V tolerant IO Cell Library....
681
0.118
General Purpose IO IP, UMC 90nm LL process
UMC 90nm LL/RVT process true 2.5V standard IO Cell Library....
682
0.118
General Purpose IO IP, UMC 90nm LL process
UMC 90nm LL/RVT process true 3.3V standard IO Cell Library Using 3.3V GOX52 IO....
683
0.118
General Purpose IO IP, 3.3V tolerance, UMC 90nm LL process
UMC 90nm LL/RVT process 3.3V tolerant IO Cell Library....
684
0.3729
High Performance/Low Power/Ultra Low Power Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, read assist, write assist, supports process HP/
Memory Compilers...
685
0.118
General Purpose IO IP, UMC 90nm LL process
UMC 90nm LL Logic/RVT process 2.5V standard IO Cell Library (MDDR IO)....
686
0.118
General Purpose IO IP, UMC 90nm LL process
UMC 90nm LL/RVT process true 2.5V standard IO Cell Library....
687
0.118
General Purpose IO IP, UMC 90nm LL process
UMC 90nm LL/RVT process true 3.3V standard IO Cell Library Using 3.3V GOX52 IO....
688
0.118
General Purpose IO IP, UMC 90nm LL process
UMC 90nm LL Logic/RVT process true 1.2/3.3V standard IO Cell Library (3.3V Generic IO)....
689
0.118
General Purpose IO IP, UMC 90nm Logic process
UMC 90nm 2.5V over-drive 3.3V GOX52 process IO....
690
0.118
General Purpose IO IP, UMC 90nm SP process
UMC 90nm SP/RVT Low-K Logic process True 3.3V Generic IO Cell Library....
691
0.118
General Purpose IO IP, 3.3V tolerance, UMC 90nm SP process
UMC 90nm Low-K SP process 3.3V tolerant IO Cell Library....
692
0.118
General Purpose IO IP, UMC 90nm SP process
UMC 90nm Low-K SP process true 2.5V standard IO Cell Library....
693
0.118
General Purpose IO IP, 3.3V tolerance, UMC 90nm SP process
UMC 90nm SP/RVT process 3.3V tolerant IO Cell Library....
694
0.118
General Purpose IO IP, UMC 90nm SP process
UMC 90nm SP/RVT Logic process TRUE 2.5V Generic IO Library....
695
0.3729
High Performance/Low Power/Ultra Low Power One Port Register File (1 Port RF) Compiler with Column Redundancy Option, with write assist, supports process HP/HPC/HPC+/HPL/HPM/LP/ULP
Memory Compilers...
696
0.118
General Purpose IO IP, True 3.3V, UMC 90nm SP process
UMC 90nm SP/RVT process true 3.3V standard IO Cell Library Using 3.3V GOX52 IO....
697
0.118
General Purpose IO IP, UMC 90nm SP process
UMC 90nm SP/RVT Logic process true 1.0/3.3V standard IO Cell Library (3.3V Analog IO)....
698
0.118
General Purpose IO IP, UMC 90nm SP process
UMC 90nm SP/RVT Logic process true 1.0/3.3V standard IO Cell Library (3.3V Generic IO)....
699
0.118
General Purpose IO IP, BOAC (Bonding Over Active Circuit), UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 1.8V BOAC IO Cell Library (with customized PU/PD function)....
700
0.118
General Purpose IO IP, 3.3V with 5V tolerance, Power-On Control, BOAC (Bonding Over Active Circuit) support, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 5V Tolerance Generic POC IO with BOAC solution....