1651 0.118

UMC 90nm LL/RVT MPCA core cell library UMC 90nm LL/RVT MPCA core cell library...

1652 0.118

UMC 65nm SP/RVT Logic Process MPCA cell library UMC 65nm SP/RVT Logic Process MPCA cell library...

1653 0.118

UMC 0.11um HS/ALE Logic Process MPCA Cell Library With minimum Via1/M2/Via2/M3/Via3/M4 programming UMC 0.11um HS/ALE Logic Process MPCA Cell Library With minimum Via1/M2/Via2/M3/Via3/M4 programming...

1654 0.118

UMC 0.11um HS/AL Logic Process High Density Version MPCA core cell library with mini programming layer from V1 to M4 UMC 0.11um HS/AL Logic Process High Density Version MPCA core cell library with mini programming layer from V1 to M4...

1655 0.118

UMC 0.11um HS/FSG Logic Process high density MPCA core cell library with minimum Via1 to M4 programming UMC 0.11um HS/FSG Logic Process high density MPCA core cell library with minimum Via1 to M4 programming...

1656 0.118

UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler...

1657 0.118

UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler with periphery LVT UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler with periphery LVT...

1658 0.118

UMC 28HPM UHS 1PRF UMC 28HPM UHS 1PRF...

1659 0.118

UMC 28nm HPM ultra high speed register compiler UMC 28nm HPM ultra high speed register compiler...

1660 0.118

UMC 40nm Low Power Process One Port Register File wit 213 cell UMC 40nm Low Power Process One Port Register File wit 213 cell...

1661 2.0

subLVDS IO Pad Set The subLVDS library provides an subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data ...

1662 0.118

UMC 40nm LP Logic Process one-port register file for area optimize with HVT peripheral UMC 40nm LP Logic Process one-port register file for area optimize with HVT peripheral...

1663 0.118

UMC 40nm LP Logic Process one-port register file for area optimize with LVT peripheral UMC 40nm LP Logic Process one-port register file for area optimize with LVT peripheral...

1664 0.118

UMC 40nm Low Power Process One Port Register File with 213 cell UMC 40nm Low Power Process One Port Register File with 213 cell...

1665 0.118

UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with HVT peripheral. UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with HVT peripheral....

1666 0.118

UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral. UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral....

1667 0.118

UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory compiler. UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory compiler....

1668 0.118

UMC 55nm ULP-SST process PG One Port Register File for periphery HVT UMC 55nm ULP-SST process PG One Port Register File for periphery HVT...

1669 0.118

UMC 90nm Standard Performance LowK Logic Process Synchronous high density single port register file SRAM memory compiler UMC 90nm Standard Performance LowK Logic Process Synchronous high density single port register file SRAM memory compiler...

1670 0.118

UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler. UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler....

1671 0.118

UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler. UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler....

1672 2.0

1.8V General Purpose I/O Pad Set The 1.8V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog power...

1673 0.118

UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler. UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler....

1674 0.118

UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler with row redundancy. UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler with row redundancy....

1675 0.118

UMC 28nm HPC Logic Process Ultra High Density Single-Port SRAM Memory Compiler UMC 28nm HPC Logic Process Ultra High Density Single-Port SRAM Memory Compiler...

1676 0.118

UMC 28nm HPC Logic Process PG Single Port SRAM memory compiler UMC 28nm HPC Logic Process PG Single Port SRAM memory compiler...

1677 0.118

UMC 28nm HPC Logic Process PG Single-Port SRAM with HVT memory compiler UMC 28nm HPC Logic Process PG Single-Port SRAM with HVT memory compiler...

1678 0.118

UMC 28nm HPC process standard synchronous HVT periphery high density single port low power SRAM memory compiler with row redundancy UMC 28nm HPC process standard synchronous HVT periphery high density single port low power SRAM memory compiler with row redundancy...

1679 0.118

UMC 28nm HPC Logic Process PG Single Port SRAM with LVT memory compiler UMC 28nm HPC Logic Process PG Single Port SRAM with LVT memory compiler...

1680 0.118

UMC 28nm HPC process standard synchronous LVT periphery high density single port low power SRAM memory compiler with row redundancy UMC 28nm HPC process standard synchronous LVT periphery high density single port low power SRAM memory compiler with row redundancy...

1681 0.118

UMC 28nm HPC process standard synchronous high density single port low power SRAM memory compiler with row redundancy UMC 28nm HPC process standard synchronous high density single port low power SRAM memory compiler with row redundancy...

1682 0.118

UMC 28nm HPM process standard synchronous high density single port SRAM memory compiler UMC 28nm HPM process standard synchronous high density single port SRAM memory compiler...

1683 2.0

2.5V Wide-Range General Purpose I/O Pad Set The 2.5V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog power...

1684 0.118

28nm HPM SP-SRAM with 1 column redundancy 28nm HPM SP-SRAM with 1 column redundancy...

1685 0.118

28nm HPM SP-SRAM with 2 column redundancy 28nm HPM SP-SRAM with 2 column redundancy...

1686 0.118

28nm HPM SP-SRAM with peri LVT 28nm HPM SP-SRAM with peri LVT...

1687 0.118

28nm HPM SP-SRAM with peri-LVT 1 column repair 28nm HPM SP-SRAM with peri-LVT 1 column repair...

1688 0.118

28nm HPM SP-SRAM with peri LVT & 2 column repair 28nm HPM SP-SRAM with peri LVT & 2 column repair...

1689 0.118

28nm HPM SP-SRAM with peri LVT row repair 28nm HPM SP-SRAM with peri LVT row repair...

1690 0.118

28nm HPM SP-SRAM with peri LVT & row & 1 column repair 28nm HPM SP-SRAM with peri LVT & row & 1 column repair...

1691 0.118

UMC 28nm HPM process synchronous LVT preiphery high density single port SRAM memory compiler with Row and 2 Column Repair UMC 28nm HPM process synchronous LVT preiphery high density single port SRAM memory compiler with Row and 2 Column Repair...

1692 0.118

28nm HPM SH with Row redundancy 28nm HPM SH with Row redundancy...

1693 0.118

28nm HPM SP-SRAM with row and 1 column repair 28nm HPM SP-SRAM with row and 1 column repair...

1694 2.0

3.3V Wide-Range General Purpose I/O Pad Set The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog power...

1695 0.118

28nm HPM SP-SRAM with Row and 2 Column Repair 28nm HPM SP-SRAM with Row and 2 Column Repair...

1696 0.118

UMC 28nm HPC Process Ultra High Speed Single-Port SRAM memory compiler UMC 28nm HPC Process Ultra High Speed Single-Port SRAM memory compiler...

1697 0.118

UMC 28nm HPC Process Ultra High Speed Single-Port SRAM Memory Compiler UMC 28nm HPC Process Ultra High Speed Single-Port SRAM Memory Compiler...

1698 0.118

UMC 40nm Low Power Process SP-SRAM with 213 bit cell UMC 40nm Low Power Process SP-SRAM with 213 bit cell...

1699 0.118

UMC 40nm LP Logic Process Single Port SRAM memory compiler using 213 bit -cell with peri-HVT UMC 40nm LP Logic Process Single Port SRAM memory compiler using 213 bit -cell with peri-HVT...

1700 0.118

UMC 40nm LP Logic Process Single Port SRAM Memory Compiler using 213 bit-cell with Peri-LVT UMC 40nm LP Logic Process Single Port SRAM Memory Compiler using 213 bit-cell with Peri-LVT...