Design & Reuse
2769 IP
1901
0.118
Ultra High Speed 1-Port Register File, 6TSRAM, Peri LVT/RVT
UMC 28nm Logic and Mixed-Mode High Performance Process Synchronous HVT+RVT Periphery Ultra-High-Speed One-Port Register File Compiler...
1902
15.0
Dual-Rail SRAM Globalfoundries 22FDX
Ultra-low voltage logic designs utilizing adaptive body biasing demand for dense SRAM solutions which fully integrates in the ABB aware implementation...
1903
15.0
Standard Cell Libraries - GLOBALFOUNDRIES 22FDX
Body biasing is a disruptive 22FDX® feature which enables the adaption of transistor threshold voltages after production during device operation. Racy...
1904
5.0
IO Library - GLOBALFOUNDRIES 22FDX
The general purpose 22FDX® IO Library features a rich set of digital and analog IO cells covering 1.2 V to 1.8 V I/O standards and 0.4 V to 0.8 V core...
1905
2.0
SSTL_ I/O Pad Set
The SSTL_2 pad set is a full complement of I/O, power, and spacer cells (total of 14 cells) that are necessary to assemble a padring by abutment. Sinc...
1906
15.0
Single Rail SRAM GLOBALFOUNDRIES 22FDX
Ultra-low voltage logic designs using adaptive body biasing demand dense SRAM solutions which fully integrate in the ABB aware implementation and sign...
1907
1.0
800MHz LVDS Cell Set for 180nm
The OT3910 is a set of cells for implementing 800Mb DDR (400MHz) LVDS IO in 180n CMOS processes. Includes transmitter and receiver IO's. Also core ...
1908
21.0
Zero Additional Mask MTP
LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade. Perfect fit for trimming and parameter storage in Sensor, Power and Analog...
1909
21.0
Embedded flash IP, 1.32V/3V 90nm
LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm and supports auto grade temperature and quality. G1 is cost...
1910
21.0
Next Generation Flash device enabling small size, low power and direct connection with digital circuit which opens up new possibiities
LEE Flash G2 (G2) is an innovative Flash IP offering unique features that no other Flash IP could offer. It is based on LEE Flash G1, which consists ...
1911
21.0
Zero Additional Mask MTP IP, 2.2-5V 4kbit HHGrace 180BCD
LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade. Perfect fit for trimming and parameter storage in Sensor, Power and Analo...
1912
21.0
Zero Additional Mask MTP IP, 2.2-5V 4kbit Towerjazz 180 PM
LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade. Perfect fit for trimming and parameter storage in Sensor, Power and Analo...
1913
21.0
Embedded flash IP, 1.5V/5V 130BCD Plus
LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm . G1 is best fit embedded flash IP to BCD nodes and it can ...
1914
21.0
Embedded flash IP, 1.5V/5V 130nm
LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm and supports auto grade temperature and quality. G1 is cost...
1915
10.0
eTCAM (Embedded Ternary Content Addressable Memory IP
TCAM can search for data that matches the input in one cycle from all the information stored in the memory.If there are multiple matching data, it is ...
1916
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rate...
1917
10.0
eTCAM (Embedded Ternary Content Addressable Memory IP
TCAM can search for data that matches the input in one cycle from all the information stored in the memory.If there are multiple matching data, it is ...
1918
5.0
2.8 Gbps LVDS IO
The LVDS I/O is a single macro (input, output and reference block). Both driver and receiver operating up to 1.4GHz (2.8 Gbps ). The Driver is designe...
1919
1.0
LVDS
This IP is a high-speed LVDS (Low-Voltage Differential Signaling) transceiver supporting multi-channel joint. The LVDS TX & RX IP is specified for ope...
1920
11.0
Configurable I/O
High-speed configurable I/O capable of signaling speeds of up to 3.2 GT/s supporting the following I/O standards...
1921
0.0
DDR5 Registering Clock Driver (RCD) (DDR5RCD01)
The DDR5RCD01 is a registering clock driver used on DDR5 RDIMMs and LRDIMMs. Its primary function is to buffer the Command/Address (CA) bus, chip sele...
1922
0.0
1024-bit EEPROM IP with configuration 32p2w16bit
The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 1024 bits (16(bit per word) x 2(word per page) x 3...
1923
0.0
7.5 Gbps DDR CML IPs library
040TSMC_CML_01 is a library including: • CML receiver (CML_RX); • CML transmitter (CML_TX). • Reference current/voltage source (CML_RS); • Refe...
1924
50.0
512x8 Bits OTP (One-Time Programmable) IP, TSM- 12FFC 0.8V/1.8V Process
The ATO00512X8TS012FFC8EA is organized as 512 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 12nmFFC stand...
1925
0.0
2048bits EEPROM with configuration 16p8w16bit
130GF_EEPROM_05 is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 2048bit, which is organized as 16 pages of 8...
1926
10.0
1-Port Register File Compiler GF22FDX Low Power
Silicon proven 1-Port Register File SRAM compiler for GF22 FDX - Memory optimized for low power and supports body biasing....
1927
2.0
1.8V General Purpose Inline I/O Pad Set
The 1.8V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibili...
1928
10.0
Single Port SRAM Compiler GF22FDX Low Power
Silicon proven Single Port SRAM compiler for GF22 FDX - Memory optimized for low power and supports body biasing....
1929
0.0
LVDS/ MIPI Combo PHY IP, Silicon Proven in SMIC 40LL
The MIPI-LVDS Combo Tx IP is designed for chips that perform high bandwidth data communication while operating at low power consumption. It can be eas...
1930
0.0
DDR5 Registering Clock Driver (RCD) (DDR5RCD03)
The DDR5RCD03 is a registering clock driver used on DDR5 RDIMMs and LRDIMMs. Its primary function is to buffer the Command/Address (CA) bus, chip sele...
1931
44.0
CodaCache® Last Level Cache IP
CodaCache is a configurable, standalone, non-coherent cache IP that delivers unique business value through its advanced last-level cache (LLC) archite...
1932
5.0
OTP One Time Programmable IP SMIC 55HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
1933
5.0
OTP IP
Zhuhai Chuangfeixin (CFX) offers two proprietary OTP technologies and respective silicon IPs:One is Anti-fuse, the other is floating gate. CFX OTP ...
1934
5.0
OTP One Time Programmable IP SMIC130
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
1935
5.0
OTP One Time Programmable IP SIL130HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
1936
5.0
OTP One Time Programmable IP SIL180
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
1937
5.0
eNOR embedded Flash embedded IP
Zhuhai Chuangfeixin’s Floating-gate eNOR Flash memory macro are silicon characterized and qualified on Huali Microelectronics Corporation 65nm Floati...
1938
2.0
3.3V Wide-Range General Purpose Staggered I/O Pad Set
The 3.3V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibili...
1939
100.0
High-Density eMRAM Compiler TSMC 22ULL
The Synopsys Foundation IP optimized for the TSMC’s 22nm Ultra Low Leakage (ULL) process provides designers an extensive offering of high-speed, high...
1940
10.0
On-chip memory expansion
The Cache MX IP compresses on-chip L2, L3 SRAM cache enabling 2x effective capacity. SRAM Caches can take upto 30-50% of an SoC xPU silicon real estat...
1941
5.0
OTP One Time Programmable IP HHGrace 90BCD
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
1942
0.0
512bit EEPROM IP with configuration 16p2w16bit
180SMIC_EEPROM_09 is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 512 bits which is organized as 16 pages of...
1943
11.0
NVM EEPROM NeoEE in UMC (180nm, 160nm, 150nm, 110nm)
eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...
1944
11.0
NVM EEPROM NeoEE in Vanguard (180nm, 150nm, 110nm)
eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...
1945
11.0
NVM eFlash NeoFlash in TSMC (160nm)
eMemory's NeoFlash IP is a cost-effective embedded Flash solution for both foundries & customers. Only 2~3 additional masks are required, and NeoFlash...
1946
11.0
NVM eFlash NeoFlash in GLOBALFOUNDRIES (110nm)
eMemory's NeoFlash IP is a cost-effective embedded Flash solution for both foundries & customers. Only 2~3 additional masks are required, and NeoFlash...
1947
11.0
NVM eFlash NeoFlash in Vanguard (160nm)
eMemory's NeoFlash IP is a cost-effective embedded Flash solution for both foundries & customers. Only 2~3 additional masks are required, and NeoFlash...
1948
11.0
NVM eFlash RRAM in UMC (40nm)
eMemory's RRAM IP is a cost-effective embedded Flash solution for both foundries & customers. Only 2~3 additional masks are required, and RRAM gives f...
1949
20.0
NVM OTP in Fujitsu (90nm, 65nm, 55nm, 40nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...
1950
3.0
Two Port Register File compiler - Memory optimized fore high density and high speed - compiler range up to 320 k
Foundry sponsored - Two Port Register File compiler - TSMC 55 nm HV - Memory optimized fore high density and high speed - compiler range up to 320 k...