1901 8.0

Embedded flash IP, 1.5V/5V 130BCD Plus LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm . G1 is best fit embedded flash IP to BCD nodes and it can...

1902 8.0

Embedded flash IP, 1.5V/5V 130nm LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm and supports auto grade temperature and quality. G1 is cos...

1903 10.0

TCAM (28nm/16nm/12nm_Embedded Ternary Content Addressable Memory IP) TCAM can search for data that matches the input in one cycle from all the information stored in the memory.If there are multiple matching data, it is ...

1904 2.0

LVDS I/O Pad Set The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rate...

1905 10.0

TCAM (7nm_Embedded Ternary Content Addressable Memory IP) TCAM can search for data that matches the input in one cycle from all the information stored in the memory.If there are multiple matching data, it is ...

1906 1.0

LVDS This IP is a high-speed LVDS (Low-Voltage Differential Signaling) transceiver supporting multi-channel joint. The LVDS TX & RX IP is specified for ope...

1907 11.0

Configurable I/O High-speed configurable I/O capable of signaling speeds of up to 3.2 GT/s supporting the following I/O standards...

1908 0.0

1024-bit EEPROM IP with configuration 32p2w16bit The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 1024 bits (16(bit per word) x 2(word per page) x 3...

1909 0.0

7.5 Gbps DDR CML IPs library 040TSMC_CML_01 is a library including: • CML receiver (CML_RX); • CML transmitter (CML_TX). • Reference current/voltage source (CML_RS); • Refe...

1910 50.0

512x8 Bits OTP (One-Time Programmable) IP, TSM- 12FFC 0.8V/1.8V Process The ATO00512X8TS012FFC8EA is organized as 512 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 12nmFFC stand...

1911 0.0

2048bits EEPROM with configuration 16p8w16bit 130GF_EEPROM_05 is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 2048bit, which is organized as 16 pages of 8...

1912 2.0

1.8V General Purpose Inline I/O Pad Set The 1.8V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibili...

1913 0.0

LVDS/ MIPI Combo PHY IP, Silicon Proven in SMIC 40LL The MIPI-LVDS Combo Tx IP is designed for chips that perform high bandwidth data communication while operating at low power consumption. It can be eas...

1914 60.0

CodaCache® Last Level Cache IP CodaCache® addresses modern design challenges through performance-optimized caching, efficient data access, and power optimization techniques. It also...

1915 0.0

OTP One Time Programmable IP SMIC 55HV Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

1916 0.0

OTP IP Zhuhai Chuangfeixin (CFX) offers two proprietary OTP technologies and respective silicon IPs：One is Anti-fuse, the other is floating gate. CFX OTP ...

1917 0.0

OTP One Time Programmable IP SMIC130 Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

1918 0.0

OTP One Time Programmable IP SIL130HV Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

1919 0.0

OTP One Time Programmable IP SIL180 Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

1920 0.0

eNOR embedded Flash embedded IP Zhuhai Chuangfeixin’s Floating-gate eNOR Flash memory macro are silicon characterized and qualified on Huali Microelectronics Corporation 65nm Floati...

1921 2.0

3.3V Wide-Range General Purpose Staggered I/O Pad Set The 3.3V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibili...

1922 10.0

On-chip memory expansion The Cache MX IP compresses on-chip L2, L3 SRAM cache enabling 2x effective capacity. SRAM Caches can take upto 30-50% of an SoC xPU silicon real estat...

1923 0.0

OTP One Time Programmable IP HHGrace 90BCD Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

1924 0.0

512bit EEPROM IP with configuration 16p2w16bit 180SMIC_EEPROM_09 is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 512 bits which is organized as 16 pages of...

1925 11.0

NVM EEPROM NeoEE in UMC (180nm, 160nm, 150nm, 110nm) eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...

1926 11.0

NVM EEPROM NeoEE in Vanguard (180nm, 150nm, 110nm) eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...

1927 11.0

NVM eFlash NeoFlash in TSMC (160nm) eMemory's NeoFlash IP is a cost-effective embedded Flash solution for both foundries & customers. Only 2~3 additional masks are required, and NeoFlash...

1928 11.0

NVM eFlash NeoFlash in GLOBALFOUNDRIES (110nm) eMemory's NeoFlash IP is a cost-effective embedded Flash solution for both foundries & customers. Only 2~3 additional masks are required, and NeoFlash...

1929 11.0

NVM eFlash NeoFlash in Vanguard (160nm) eMemory's NeoFlash IP is a cost-effective embedded Flash solution for both foundries & customers. Only 2~3 additional masks are required, and NeoFlash...

1930 11.0

NVM eFlash RRAM in UMC (40nm) eMemory's RRAM IP is a cost-effective embedded Flash solution for both foundries & customers. Only 2~3 additional masks are required, and RRAM gives f...

1931 20.0

NVM OTP in Fujitsu (90nm, 65nm, 55nm, 40nm) Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD proc...

1932 3.0

Two Port Register File compiler - Memory optimized fore high density and high speed - compiler range up to 320 k Foundry sponsored - Two Port Register File compiler - TSMC 55 nm HV - Memory optimized fore high density and high speed - compiler range up to 320 k...

1933 0.0

ONFI4.0 NAND Flash IO in SMIC 40NLL, upto 800Mbps Brite ONFI IO is applied for NAND flash memory interface. Brite ONFI IO libraries are compliant to ONFI 5.0/4.2/4.0/3.2 standards with ODT (On-Die Ter...

1934 0.0

DDR combo IO in SMIC 55NLL, supporting DDR2/3/3L /LPDDR2/3, upto 1333Mbps Brite DDR IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200Mbps to 4805Mbps. Brite p...

1935 0.0

DDR combo IO in SMIC 28HKC+, supporting DDR3,4/LPDDR3,4, upto 2667Mbps Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...

1936 0.0

DDR combo IO in SMIC 40NLL, supporting DDR3,3U,3L,4/LPDDR2,3, upto 1866Mbps Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...

1937 0.0

DDR combo IO in SMIC 40NLL, supporting DDR2,3/LPDDR2,3, upto 1333Mbps Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...

1938 0.0

DDR combo IO in SMIC 28HKD 0.9/2.5V, supporting DDR2,3/LPDDR2,3, upto 1600Mbps for IOT application Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...

1939 0.0

DDR combo IO in SMIC 28HKD 0.9/2.5V, supporting DDR3,4/LPDDR3,4, upto 1866Mbps Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...

1940 0.0

TCAM in SMIC 28HK+ upto 800Mbps ...

1941 0.0

DDR combo IO in SMIC 28HKD 0.9/1.8V, supporting DDR3,4/LPDDR3,4, upto 2667Mbps Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...

1942 0.0

LVDS IO in SMIC 28HKC+, upto 1.6Gbps LVDS IO can be applied for various die-to-die interface communication. Brite LVDS IO libraries can support data rate up to 2000Mbps with 2.5V and 1.8V...

1943 0.0

LVDS IO in SMIC 40NLL, upto 800Mbps LVDS IO can be applied for various die-to-die interface communication. Brite LVDS IO libraries can support data rate up to 2000Mbps with 2.5V and 1.8V...

1944 0.0

PSRAM/SD3.0/EMMC5.1 IO in SMIC 28HKD 0.9/2.5V, upto 600Mbps ...

1945 0.0

2KByte EEPROM in SMIC 130EF ...

1946 200.0

TSMC GF LVDS Tx/Rx with optional CMOS I/O Flexible I/O cell for data and clock applications that supports differential (and optionally single-ended) Tx and Rx capabilities with no external com...

1947 0.0

8Kx8 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V Logic/BCD Process The ATO0008KX8MX180LBX4DA is organized as an 8K-bits by 8 one-time programmable memory. This is a kind of non-volatile memory fabricated in MXI- 0.1...

1948 2.0

Digital Cell Library The agileDSCL is a compact digital standard cell library customizable for specific foundries and processes, and optimized for low-power, ultra-low-lea...

1949 2.0

LVDS IO Pad Set The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...

1950 2.0

General-Purpose I/O (GPIO) - 1.5V-1.8V The 1.8V General Purpose I/O libraries provide bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog powe...