Design & Reuse
2807 IP
1951
6.0
MultiPort Low Voltage Register File
MiniMiser™ is a tuneable multi-port register file architecture that can support both low power and high-performance applications. Its unique implement...
1952
6.0
PowerMiser Ultra Low Power Embedded SRAM TSMC 130
PowerMiser(TM) delivers best-in-class static and dynamic power performance. Its patented “Bit Line Voltage Control” techniques eliminate performance c...
1953
6.0
PowerMiser Ultra Low Power Embedded SRAM TSMC 180
PowerMiser(TM) delivers best-in-class static and dynamic power performance. Its patented “Bit Line Voltage Control” techniques eliminate performance c...
1954
7.0
PowerMiser Ultra Low Power Embedded SRAM TSMC 40ULP
PowerMiser(TM) delivers best-in-class static and dynamic power performance. Its patented “Bit Line Voltage Control” techniques eliminate performance c...
1955
6.0
PowerMiser Ultra Low Power Embedded SRAM TSMC 55ULP
PowerMiser(TM) delivers best-in-class static and dynamic power performance. Its patented “Bit Line Voltage Control” techniques eliminate performance c...
1956
6.0
PowerMiser Ultra Low Power Embedded SRAM TSMC 90
PowerMiser(TM) delivers best-in-class static and dynamic power performance. Its patented “Bit Line Voltage Control” techniques eliminate performance c...
1957
7.0
Standard cell cryogenic recharacterisation service for GF 22FDX to 4K operating temp
Provides a cryogenic recharacterisation service for standard cells to operate down to 4K...
1958
7.0
Ultra Low Power Embedded SRAM on TSMC 16FFC
PowerMiser(TM) delivers best-in-class static and dynamic power performance. Its patented “Bit Line Voltage Control” techniques eliminate performance c...
1959
0.0
ONFI4.0 NAND Flash IO in SMIC 40NLL, upto 800Mbps
Brite ONFI IO is applied for NAND flash memory interface. Brite ONFI IO libraries are compliant to ONFI 5.0/4.2/4.0/3.2 standards with ODT (On-Die Ter...
1960
0.0
DDR combo IO in SMIC 55NLL, supporting DDR2/3/3L /LPDDR2/3, upto 1333Mbps
Brite DDR IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200Mbps to 4805Mbps. Brite p...
1961
0.0
DDR combo IO in SMIC 28HKC+, supporting DDR3,4/LPDDR3,4, upto 2667Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
1962
0.0
DDR combo IO in SMIC 40NLL, supporting DDR3,3U,3L,4/LPDDR2,3, upto 1866Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
1963
0.0
DDR combo IO in SMIC 40NLL, supporting DDR2,3/LPDDR2,3, upto 1333Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
1964
0.0
DDR combo IO in SMIC 28HKD 0.9/2.5V, supporting DDR2,3/LPDDR2,3, upto 1600Mbps for IOT application
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
1965
0.0
DDR combo IO in SMIC 28HKD 0.9/2.5V, supporting DDR3,4/LPDDR3,4, upto 1866Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
1966
0.0
TCAM in SMIC 28HK+ upto 800Mbps
...
1967
0.0
DDR combo IO in SMIC 28HKD 0.9/1.8V, supporting DDR3,4/LPDDR3,4, upto 2667Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
1968
0.0
LVDS IO in SMIC 28HKC+, upto 1.6Gbps
LVDS IO can be applied for various die-to-die interface communication. Brite LVDS IO libraries can support data rate up to 2000Mbps with 2.5V and 1.8V...
1969
0.0
LVDS IO in SMIC 40NLL, upto 800Mbps
LVDS IO can be applied for various die-to-die interface communication. Brite LVDS IO libraries can support data rate up to 2000Mbps with 2.5V and 1.8V...
1970
0.0
PSRAM/SD3.0/EMMC5.1 IO in SMIC 28HKD 0.9/2.5V, upto 600Mbps
...
1971
0.0
2KByte EEPROM in SMIC 130EF
...
1972
100.0
TSMC GF LVDS Tx/Rx with optional CMOS I/O
Flexible I/O cell for data and clock applications that supports differential (and optionally single-ended) Tx and Rx capabilities with no external com...
1973
0.0
8Kx8 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V Logic/BCD Process
The ATO0008KX8MX180LBX4DA is organized as an 8K-bits by 8 one-time programmable memory. This is a kind of non-volatile memory fabricated in MXI- 0.1...
1974
2.0
Digital Cell Library
The agileDSCL is a compact digital standard cell library customizable for specific foundries and processes, and optimized for low-power, ultra-low-lea...
1975
2.0
LVDS IO Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
1976
2.0
General-Purpose I/O (GPIO) - 1.5V-1.8V
The 1.8V General Purpose I/O libraries provide bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog powe...
1977
2.0
1.2V GPIO
The 1.2V GPIO library provides a bidirectional I/O driver for Parallel Trace Interface applications. This cell is compliant with version 2.0 of the th...
1978
0.0
3.3V Wide-Range General Purpose I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along with corner and spac...
1979
0.0
SD 3.0 I/O Pad Set
The SD library provides the driver / receiver cell and required support cells for SD 3.0 signaling. Fault-tolerant operation. This library is offere...
1980
0.0
RGMII IO Pad Set
The (R)GMII library provides the combo driver / receiver and required support cells for (R)GMII signaling. The libraries are compliant with the Gigabi...
1981
0.0
3.3V Wide-Range General Purpose I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog power...
1982
2.0
I2C I/O Pad Set
The I2C libraries provide the bidirectional I/O for two-line serial communication per Rev. 4 of the I2Cbus industry specification. The design is compa...
1983
2.0
1.2V GPIO library designed for the SVID three-line interface.
The 1.2V GPIO library provides an open-drain bi-directional I/O driver designed for the SVID three-line interface. It is compliant with the Intel SVID...
1984
2.0
I3C I/O Library
The I3C library provides a bi-directional I/O driver designed for the I3C two-line interface. It is compliant with the MIPI Specification for I3C –Ver...
1985
2.0
1.8V General Purpose I/O Pad Set
The 1.8V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along with corner and spa...
1986
1.0
Programmable Special IO in SMIC0.13um
AR750S13 is a programmable special IO cell supporting various JEDEG standards, such as LVDS, LVTTL, LVCMOS-33/25/18/15, SSTL_3/2/18. The IP is extreme...
1987
10.0
256x8 Bits OTP (One-Time Programmable) IP, TSM- 22ULP 0.8V/1.8V process
The AT256X8T22ULP6AA is organized as 256 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- 22nm ULP CMOS...
1988
0.0
256x8 Bits OTP (One-Time Programmable) IP, TSM- 40G 0.9/1.8V Process
The AT256X8T40G6AA is organized as 256 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- 40nm G standard...
1989
0.0
4Kx9 Bits OTP (One-Time Programmable) IP, Globa-Foundr--- 12LP+ 0.8V/1.8V Process
The ATO0004KX9GF012LPP8ZA is organized as 4K-bits by 9 one-time programmable (OTP). This is a type of non-volatile memory fabricated in Globa-Foundr--...
1990
10.0
16Kx33 Bits OTP (One-Time Programmable) IP, TSM- 40LP 1.1V/2.5V Process
The ATO016KX33TS040LLP7ZA is organized as 16K-bits by 33 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ...
1991
10.0
768x39 Bits OTP (One-Time Programmable) IP, TSM- 55ULP 0.9V–1.2V / 2.5V Process
The ATO0768X39TS055ULP4NA is organized as 768x39 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 55nm LP 1.2V/2....
1992
0.0
1x32 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm SiGe BiCMOS 1.8V/3.3V Process
The ATO0001X32TS180SGE3NA is organized as 1 by 32 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.18um SiGe Bi...
1993
0.0
128x8 Bits OTP (One-Time Programmable) IP, TSM- 55nm LP 1.2V/2.5V & ULP 0.9V/2.5V Mixed-Signal, General Purpose Process
The ATO00128X8TS055ULP3NA is organized as 128x8 one-time programmable (OTP) in 8-bit read and 1-bit program modes. This is a kind of non-volatile memo...
1994
10.0
64x8 Bits OTP (One-Time Programmable) IP, UM- 55nm ULP standard CMOS core logic Process
The AT64X8U55ULP6AA is organized as a 64-word by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 55nm ULP standard ...
1995
0.0
4Kx8 Bits OTP (One-Time Programmable) IP, VI- 0.15µm 1.8V/5V BCD GIII Process
The ATO0004KX8VI150BG33NA is organized as a 4K-bits by 8 one-time programmable. This is a kind of non-volatile memory fabricated in VI- 0.15µm BCD G...
1996
10.0
64x8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18μm XH018 Modular Mixed Signal Process
The ATO00064X8XH180TG33NA is organized as a 64-bit by 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in X-FA- 0.18μm ...
1997
0.0
512x1 Bits OTP (One-Time Programmable) IP, VI- 0.15μm BCD Generation-2 Process
The ATO00512X1VI150B252NB is organized as a 512-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in VI- 0.15μm B...
1998
10.0
4Kx16 Bits OTP (One-Time Programmable) IP, UM- 110 nm 1.2V/3.3V L110AE Process
The AT4K16U110MAE0DA is organized as a 4K-bits by 16 one-time programmable memory. This is a kind of non-volatile memory fabricated in UM- L110AE proc...
1999
0.0
8Kx16 Bits OTP (One-Time Programmable) IP, VI- 110nm E-Flash 1.5V/3.3V Process
The ATO008KX16VI110EFM5DA I-fuse® IP is organized as 8Kx16 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in VI- 1...
2000
0.0
128x16 Bits OTP (One-Time Programmable) IP, X-FA- XR013 2.5V SOI Process
The AT128X16B130XR0BA is organized as 128 words by 16 bits one-time programmable in 16-bit read and 1-bit program modes. This is a type of non-volat...