2051 0.0

512x1 Bits OTP (One-Time Programmable) IP, TSM- 152nm 1.8V/3.3V Mixed Signal The ATO00512X1TS152GMS3NA is organized as a 512-bits by 1 one-time programmable in parallel mode. This is a kind of non-volatile memory fabricated in...

2052 0.0

512x1 Bits OTP (One-Time Programmable) IP, VI- 110nm 1.5V/3.3V The AT512X1V110MM0AA is organized as a 512-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in VIS 110nm CMOS l...

2053 0.0

768x1 Bits OTP (One-Time Programmable) IP, UM- 110 nm 1.2V/3.3V L110AE The AT768X1U110MAE0AA is organized as 768 bits by 1 one-time programmable in 1-bit read and 1-bit program modes. This is a kind of non-volatile memor...

2054 0.0

64x1 Bits OTP (One-Time Programmable) IP, TSM- 0.16um 1.8V/3.3V Process The ATO00064X1TS160MSG3NA is organized as a 64-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.18um CMOS ...

2055 0.0

32x1 Bits OTP (One-Time Programmable) IP, UM- 0.162μm 1.8V/3.3V Process The AT32X1U162GN0AA is organized as a 32-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.162um standard C...

2056 0.0

768x3 Bits OTP (One-Time Programmable) IP, UM- 142 nm 1.8V/3.3V CIS The AT768X3U142CIS0AA is organized as 768-bits by 3 one-time programmable in parallel mode. This is a kind of non-volatile memory fabricated in 0.142...

2057 0.0

512x1 Bits OTP (One-Time Programmable) IP, NJR- 0.05μm UD50SP Process The AT512X1UD50SP0AA is organized as a 512-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in UD50SP process. ...

2058 0.0

8kx8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18μm XH018 Modular Mixed Signal Process The ATO0008KX8XF180HMH4DA is organized as a 8k-bit by 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in X-FA- 0.18μm ...

2059 5.0556

HDMI, LVDS, RF and Analog Pads Library in 45nm / 40nm in TSMC 45/40nm A 1.0V to 5V Analog IO Library that includes an HDMI, LVDS, and Analog/RF Low Capacitance pad set in 45nm/40nm HPM processes. This library is a col...

2060 5.0556

1.0-3.3V GPIO With I2C Open Drain And 3.3V & 5V Analog Cells in TSMC 65nm A TSMC 65nm Wirebond IO library with 1-3.3V GPIO, 3.3V pulse-width modulation cell, I2C & SVID open-drain cells, 3.3V & 5V analog cells, OTP program c...

2061 4.0556

6.5V ESD Clamp in TSMC180nm Technology Standalone 6.5V ESD Power Clamp in 180nm technology for use in wirebond or flipchip....

2062 5.0556

TSMC 55/65nm RF ESD specifiically targeting low capacitance ESD RF ESD specifically targetting low capacitance ESD protection strategies. It is not a full IO Library, but a collection of standalone ESD cells. ESD t...

2063 4.0556

Specialized Analog I/O Library in GlobalFoundires 55nm LPx Specialized Analog I/O Library with 1.2V, 1.8V, 3.3V, and 5V integrated Analog I/Os and ESD; includes a custom 12V I/O ESD solution....

2064 4.0556

I/O Library with 1.5V to 3.3V GPIO in GlobalFoundries 180 BCDLite An I/O Library featuring three cells, a 1.5V to 3.3V GPIO, Power Pad for External VDD supply with ESD, and Ground Reference Pad with ESD. Includes Sch...

2065 5.0556

A TSMC 16nm 2Gbps LVDS/SLVS Combo Transceiver This combo transceiver is a highly configurable 2Gbps transceiver for LVDS or SLVS interfaces. With features like dynamic interface selection, on-die ...

2066 4.0556

A radiation-hardened GlobalFoundries 12nm LP/LP+ 0.8V LVDS Transceiver Certus Semiconductor’s 2.5Gbps LVDS transceiver in GlobalFoundries LP/LP+ is designed for high-speed, low-power data transmission in radiation-intensi...

2067 5.0556

TSMC 28nm Wirebond and FlipChip compatible <80fF ESD Solutions for Multi-Gigabit SerDes Applications. This silicon-proven TSMC 28nm Digital I/O Library delivers a low-capacitance, high-reliability interface solution optimized for advanced semiconductor...

2068 5.0556

A TSMC 55nm Specialized 20V Analog I/O in Standard Low Voltage CMOS This silicon-proven TSMC 55nm LP 20V ESD cell is a high-voltage electrostatic discharge (ESD) protection solution specifically engineered for low-powe...

2069 5.0556

A TSMC 55nm SoundWire 0.9V/1.2V I/O Library This SoundWireDigital I/O Library in TSMC 55nmLPoffersanadvanced, low-power interface solution for high-performance audio applications. Supporting 0.9...

2070 5.0556

A TSMC 55nm SoundWire Inline 0.9V/2.5V I/O Library This SoundWire Digital I/O Library in TSMC 55nm LP is a silicon-proven interface solution for high-performance audio applications. Designed for 0.9V/2...

2071 5.0556

A Flip-Chip compatible I/O Library in TSMC 180nm BCD with 1.8V GPIO, 1.8V to 3.3V Analog, with associated ESD cells. Certus’ silicon-proven I/O library in TSMC 180nm BCD provides a reliable and flexible solution for mixed-signal, power management, and BCD application...

2072 5.0556

5V Library for Generic I/O and ESD Applications TSMC 12nm FFC/FFC+ process. This library is a base set of ESD protection structures for I/O and Power supplies. The design targets up to 8A applications (>8kV HBM).The I/Os are d...

2073 5.0556

A 2Gbps SLVS Transceiver in TSMC 28nm This 1.8V SLVS transceiver is a high-performance, low-power I/O solution optimized for TSMCs 28nm process. Designed with 1.8V thick oxide devices and ...

2074 5.0556

A 2Gbps LVDS Tranceiver in TSMC 28nm This 1.8V LVDS transceiver, designed for TSMCs 28nm process, delivers high-speed, low-power differential signaling with superior signal integrity. Eng...

2075 5.0

OTP One Time Programmable IP Silterra 160HV Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

2076 5.0

OTP One Time Programmable IP HHGrace 55LP Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

2077 5.0

OTP One Time Programmable IP HHGrace 55HV Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

2078 5.0

OTP One Time Programmable IP Nexchip 55HV_6V Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

2079 5.0

OTP One Time Programmable IP Nexchip 110HV Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

2080 5.0

OTP One Time Programmable IP Nexchip 110LP2 Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

2081 5.0

OTP One Time Programmable IP SMIC 28HV Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

2082 5.0

OTP One Time Programmable IP Samsung 90CIS Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

2083 5.0

OTP One Time Programmable IP HLMC 55CIS Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

2084 5.0

OTP One Time Programmable IP SMIC 153nm Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

2085 5.0

OTP One Time Programmable IP XMC 55LL Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

2086 0.3729

Dual Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P Memory Compilers...

2087 0.3729

Dual Port SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P Memory Compilers...

2088 0.118

Dual Port SRAM Compiler IP, UMC 0.13um SP/FSG process UMC 0.13um SP/FSG Logic process high density synchronous high density Dual Port (2RW) SRAM memory compiler....

2089 0.118

Dual Port SRAM Compiler IP, UMC 0.13um HS/FSG process UMC 0.13um HS/LL fusion (FSG) process high density synchronous high density Dual Port (2RW) SRAM memory compiler....

2090 0.118

Dual Port SRAM Compiler IP, Support Repair Features, UMC 65nm SP process UMC 65nm SP/RVT Logic and HVT Low-K process synchronous, high density, Dual Port SRAM compiler with the row redundancy option....

2091 0.118

Dual Port SRAM Compiler IP, UMC 0.11um HS/AE process UMC 0.11um HS/AE Logic process synchronous High-density Dual Port SRAM memory compiler....

2092 0.118

Dual Port SRAM Compiler IP, UMC 0.11um LL/AE process UMC 0.11um LL/AE (AL Advanced Enhancement) Logic process synchronous high density Dual Port SRAM memory compiler....

2093 0.118

Dual Port SRAM Compiler IP, UMC 0.11um HS/FSG process UMC 0.11um HS/RVT Logic process synchronous high density Dual Port SRAM memory compiler....

2094 0.118

Dual Port SRAM Compiler IP, UMC 0.153um MS process UMC 153nm Mixed-Mode/Logic process synchronous high density Dual Port SRAM memory compiler....

2095 0.118

Dual Port SRAM Compiler IP, UMC 0.18um MS process UMC 0.18um MM/RF process synchronous high density Dual Port SRAM memory compiler....

2096 0.118

Dual Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm SP Low-K Logic process Low Power synchronous high density Dual Port SRAM memory compiler....

2097 0.118

Dual Port SRAM Compiler IP, Support Repair Features, UMC 55nm SP process UMC 55nm SP Low-K Logic process Low Power synchronous high density Dual Port SRAM memory compiler with redundancy....

2098 0.118

Dual Port SRAM Compiler IP, Support Repair Features, UMC 55nm SP process UMC 55nm 1.0V Standard Performance (SP) Low-K Logic process synchronous, high density, Dual Port SRAM with row redundancy option....

2099 0.118

Dual Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm SP Low-K Logic process synchronous Dual Port RAM memory compiler....

2100 0.118

Dual Port SRAM Compiler IP, UMC 65nm SP process UMC 65nm 1.0V SP Low-K Logic process synchronous high density Dual Port SRAM compiler (with row redundancy option)....