2701 2.0

Single Port SRAM compiler - Memory optimized for ultra high density and low power - compiler range up to 576 k Single Port SRAM compiler - TSMC 40 nm LP - Non volatile Memory optimized for ultra high density and low power - compiler range up to 576 k...

2702 0.0

9 track thick oxide standard cell library at TSMC 180 - low leakage and direct battery connection (operating voltages from 1.62 V to 3.63 V) TSMC 180 RF, SESAME BIV, a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through the...

2703 0.0

6 track High Density standard cell library at TSMC 180 nm TSMC 180 uLL, SESAME HD DV provides the best trade-off between area and power achieved from an innovative cell design enabling 6-track cells and 1P3M ...

2704 0.0

Foundry sponsored - Single Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 320 k Foundry sponsored - Single port SRAM compiler - TSMC 55 nm uLP - Memory optimized for high density and low power - Dual Voltage - compiler range up to...

2705 0.0

Single Port SRAM compiler - Memory optimized for ultra high density and high speed - compiler range up to 320 k Single Port SRAM compiler - TSMC 65 nm LP - Memory optimized for ultra high density and high speed - compiler range up to 320 k...

2706 2.0

Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k Foundry sponsored - Single Port SRAM compiler - TSMC 180 nm uLL_HV - Memory optimized for high density and Low power - compiler range up to 320 k...

2707 0.0

6 track Ultra High Density standard cell library at TSMC 90 nm with dual voltage capability TSMC 90 uLL, SESAME uHD for ultra high-density logic design thanks to 6-track cells combined with pulsed latch cells acting as spinner cells (densest ...

2708 0.0

6 track Ultra High Density standard cell library at TSMC 90 nm with dual voltage capability TSMC 90 LPeF, SESAME uHD for ultra high-density logic design thanks to 6-track cells combined with pulsed latch cells acting as spinner cells (densest...

2709 2.0

Single Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 40 k Foundry sponsored - Single Port Register File compiler - TSMC 55 nm uLP - Memory optimized for high density and low power - Dual Voltage - compiler ra...

2710 3.0

Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 40 kbits Single Port Register File compiler - TSMC 90 nm uLL - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 40 kbits...

2711 3.0

Two Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k Foundry sponsored - Two Port Register File compiler - TSMC 55 nm uLPeFlash - Memory optimized for high density and low power - Dual Voltage - compiler...

2712 3.0

Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 72 k Dual Port SRAM compiler - TSMC 55 nm uLPeFlash - Memory optimized for high density and low power - Dual Voltage - compiler range up to 72 k...

2713 0.0

Single Port SRAM compiler - Memory optimized for ultra high density and low power - 3ML- compiler range up to 320 k Foundry sponsored - Single Port SRAM compiler - TSMC 55 nm HV - Memory optimized for ultra high density and low power - 3ML- compiler range up to 320 ...

2714 0.0

Single Port SRAM compiler - Memory optimized for high density and low power - Deep N Well supported - compiler range up to 320 k Single Port SRAM compiler - TSMC 55 nm LP - Memory optimized for high density and low power - Deep N Well supported - compiler range up to 320 k...

2715 3.0

Single Port SRAM compiler - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 640 kbits Single Port SRAM compiler - TSMC 90 nm uLL - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 640 kbits...

2716 3.0

6 track Ultra High Density standard cell library at TSMC 55 nm Foundry Sponsored, TSMC 55 LeFP, SESAME uHD for ultra high-density logic design thanks to 6-track cells combined with pulsed latch cells acting as spi...

2717 0.0

Single Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 320 k Foundry sponsored - Single Port SRAM compiler - TSMC 55 uLPeFlash - Memory optimized for high density and low power - Dual Voltage - compiler range up...

2718 2.0

Single Port Register File compiler - Memory optimized for high density and high speed - Dual voltage - compiler range up to 40 k Single Port Register File compiler - TSMC 90 nm LPeF - Memory optimized for high density and high speed - Dual voltage - compiler range up to 40 k...

2719 3.0

Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k Foundry sponsored - Single Port Register File compiler - TSMC 90 nm LPeF - Memory optimized for high density and high speed - compiler range up to 40 ...

2720 2.0

Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 640 k Foundry sponsored - Single Port SRAM compiler - TSMC 90 nm LPeF - Memory optimized for high density and Low power - compiler range up to 640 k...

2721 0.0

7 track Extra Low Consumption standard cell library with Dual voltage capability (1.8 V +/-10% / 1.1 V +/- 10%) TSMC 180 BCD, SESAME eLC DV is specifically designed to enable robust dual voltage operation, with characterizations taking into account physical phen...

2722 0.0

7 track Extra Low Consumption standard cell library with Dual Voltage capability TSMC 180 RFID, SESAME eLC is specifically designed to enable Dual Voltage operation (1.8 V +/- 10% 1.1 V +/- 10%) and to operate near threshold volta...

2723 0.0

Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k...

2724 3.0

sROMet compiler - TSMC 40 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler range up to 1M sROMet compiler - TSMC 40 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler range up to 1M...

2725 2.0

Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k Single Port SRAM compiler - TSMC 180 nm BCD Gen2 - Memory optimized for high density and Low power - compiler range up to 320 k...

2726 3.0

12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V) TSMC 40 LPeF, SESAME BiV, a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through th...

2727 3.0

12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V) SESAME BiV 40 LP a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through the use of ...

2728 0.0

1.25 Gbps 4-Channel LVDS Deserializer in Samsung 28FDSOI The MXL-LVDS-RX-4CH is a high performance 4-channel LVDS Receiver implemented using digital CMOS technology. Both the serial and parallel data are org...

2729 0.0

LVDS TX+ (Transmitter) in UMC 40LP The MXL-LVDS-SR-TX+ is a high performance 4-channel LVDS transmitter implemented using digital CMOS technology. With a maximum transmit clock frequenc...

2730 4.0556

1.8V/3.3V Switchable GPIO With 5V I2C Open - Drain & Analog Cells in Samsung 11nm LPP SAMSUNG 11nm Flip-Chip IO library with dynamically switchable 1.8V/3.3V GPIO with fail-safe capability, 5V I2C / SMBUS open-drain cell, 5V OTP cell, 1...

2731 4.0556

A 3.3V Wirebond I/O Library with 8kV HBM ESD, a 1.2Gbps LVDS Tx, and I2C compliant ODIO This library ensures robust reliability in challenging environments, with capabilities including 8kV HBM, 500V CDM, and a robust 2kV IEC 61000-4-2 sy...

2732 4.0556

1.8V & 3.3V Radiation Hardened GPIO with Optimized LDO in GlobalFoundries 12 LP/LP+ This radiation-hardened, by design, library features both a 1.8 and 3.3V GPIO with multiple drive strengths of 2mA, 4mA,8mA, and 16mA, along with a fu...

2733 4.0556

IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes Certus Semiconductor has a long history of working across a broad range of technology nodes from 180nm down to the latest FinFet offerings. Our I/O s...

2734 5.0556

Specialized 1.2V to 3.3V Fail-Safe GPIO and 3.3V I2C Open-Drain, SPI in TSMC 110nm This silicon proven, wirebond and flipchip compatible library is particularly tailored to address gaps in the native foundry IO offerings for this nod...

2735 4.0556

Specialized 1.2V to 3.3V Fail-Safe GPIO and 3.3V I2C Open-Drain in Dongbu HiTek 110nm This silicon-proven Wirebond compatible library in Dongbu HiTek 110nm features a multi-voltage, multi-standard General Purpose Input Output with an Op...

2736 4.0556

A GlobalFoundries 65nm/55nm Wirebond IO Library with 1.2V to 3.3V GPIO and 5V ODIO Full Custom IO Library. Multi-voltage GPIO Library. Includes 5V Open-Drain; precision PWM Output, 1.2V to 3.3V GPIOs and Analog/RF IOs. Also include ...

2737 4.0556

Flipchip 5V Fail-Safe GPIO, 5V GPIO, 5V GPI and I2C Compliant 5V ODIO in Dongbu HiTek 130nm This flip-chip compatible library in Dongbu HiTek 130nm features a fail-safe GPIO, two standard GPIOs, a 5V GPI, and 5V I2C-compliant ODIO. The GFGPIO...

2738 5.0556

TSMC 22nm ULL Wirebond I/O Library with ultra-low leakage 1.8V GPIO, 1.8V I2C ODIO and 1.8V Analog Cell This is an ultra-low leakage library. The GPIO has a typical leakage of only 150pA from VDDIO and 1nA from VDD. The library has a GPIO and an ODIO. Th...

2739 5.0556

TSMC 22nm ULL Wirebond/Flipchip I/O Library with switchable 1.8V/3.3V GPIO, 3.3V I2C ODIO, and 3.3V Analog Cell This is an ultra-low leakage library. The GPIO has a worst-case leakage of only 425nA. It works with a wide VDDIO supply range from 1.8V to 3.3V durin...

2740 5.0556

Three-Speed Inline I/O Library with ODIO in TSMC 22nm This silicon-proven, flip chip library in TSMC 22nm boasts three variants of GPIOs and one ODIO. All GPIO and ODIO cells have NS and EW orientation. A...

2741 5.0556

1.8V/3.3V flipchip I/O library with 4kV HBM ESD protection, I2C compliant ODIO in TSMC 12nm This library is a production-quality, silicon-proven I/O library in TSMC 12nm technology. Supports multi-voltage GPIOs, capable of operating at 1.8V o...

2742 5.0556

A TSMC 130nm Wirebond/Flipchip compatible I/O Library with 5V GPIO, 5V ODIO, 5V Analog I/O and 5V Power Supply I/O This silicon-proven, I/O Library features a 5V General Purpose I/O, 5V Open-Drain I/O, 5V Analog I/O, 5V Power Supply and an area efficient 5V ESD pro...

2743 5.0556

1.8V/3.3V Flipchip I/O Library with 4kV HBM, I2C Compliant ODIO and 5V Hot-Plug Detect in TSMC 16nm This library is a production-quality, silicon-proven I/O library in TSMC 16nm technology. Supports multi-voltage GPIOs, capable of operating at 1.8V o...

2744 5.0556

1.8V/3.3V Fail-Safe Multi-Voltage GPIO in TSMC 28nm This silicon-proven TSMC 28nm Digital I/O Library delivers a high-performance, low-power interface solution designed for advanced digital applications...

2745 5.0556

A Flip-Chip compatible I/O Library in TSMC 180nm BCD with 1.8V to 5V GPIO, 1.8V to 5V analog, with ultra low-cap/low-leakage RF solutions. This silicon proven flip-chip compatible library in TSMC 180nm BCD features a multi-voltage GPIO, 1.8V to 5V analog I/O, and ultra-low capacitance and...

2746 5.0556

A TSMC 22nm Inline Wirebond 1.8V to 3.3V Multi-Voltage GPIO with 5V Open-Drain I/O This I/O Libraru is a high-performance I/O solution for TSMC 22nm technology, supporting both digital and analog interfaces. Designed for 1.8V3.3V op...

2747 0.0

LVDS RX PHY & Controller Innosilicon LVDS implements LVDS TIA/EIA protocol. It specifies a low-voltage point-to-point signal interface, which uses a differential driver connec...

2748 0.0

LVDS TX Combo TTL PHY Innosilicon LVDS implements LVDS TIA/EIA protocol. Normally, Innosilicon LVDS contains four 7-bit parallel-load serial-out shift registers, a 7X clock...

2749 0.0

LVDS TX PHY & Controller Innosilicon LVDS implements LVDS TIA/EIA protocol. It specifies a low-voltage point-to-point signal interface, which uses a differential driver connec...

2750 5.0556

Controlled Impedance Multi-Protocol I/O Library featuring three I/O cells in TSMC 16nm This I/O library is a high-performance GPIO solution designed for the TSMC FFC/FCC+ process. This flipchip compatible library provides a robust and fl...