2101 1.0

Front End Module operating from 24 – 30 GHz and can be used in low power Ka band applications RFFEM01C Front End Module operates from 24 – 30 GHz and can be used in low power Ka band application. The input and output are matched to 50 ohms with...

2102 1.0

Front End Module operating from 2 – 7 GHz and can be used in S / C band for Wi-Fi 6 & SATCOM applications. RFFEM02C Front End Module operates from 2 – 7 GHz and can be used in S / C for Wi-Fi 6 & SATCOM applications. The input and output are matched to 50 o...

2103 1.0

Buffer Amplifier operating from 10-45 GHz and can be used in wide band application or to drive the high power amplifier RFBA02C Buffer Amplifier operates from 10-45 GHz and can be used in wide band application or to drive the high power amplifier. The amplifier provides...

2104 1.0

Up convert LO reject Mixer used in RF transceiver applications RFUD01C (UPC Mixer) is LO reject Mixer used in RF transceiver applications. The process used to design UPC Mixer is 0.1um GaAs pHEMT. This is singly b...

2105 1.0

Downconverter IR SSB Mixer used in receives RFDN02C (DNC Mixer) is IR SSB Mixer used in receive application. The process used to design DNC Mixer is 0.1um GaAs pHEMT. This Mixer employs two resi...

2106 1.0

Low noise amplifier with lange couplers for 24-42 GHz frequencies for 5G , satcom and other applications RFLN06C is a four stage low noise amplifier. It provides high gain over wide bandwidth, low noise figure, high isolation, stability. The LNA is design...

2107 1.0

Active frequency doubler, designed for use in the LO Path after VCO to double up the LO frequency RFDBL03C is an active frequency doubler, designed for use in the LO Path after VCO to double up the LO frequency within the IC to feed in and drive th...

2108 1.0

Active frequency doubler, designed for use in the LO Path after VCO to double up the LO frequency RFDBL04C is an active frequency doubler, designed for use in the LO Path after VCO to double up the LO frequency within the IC to feed in and drive th...

2109 1.0

DNC IR SSB Mixer used in transceiver applications RFDN03C (DNC Mixer) is IR SSB Mixer used in transceiver application. The process used to design DNC Mixer is 0.1um GaAs pHEMT. This Mixer employs two ...

2110 1.0

RF SPDT Switch from 20-40 GHz used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation RFSW04C RF SPDT Switch is used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation....

2111 0.0

UMC L65LP 65nm DDR DLL - 104MHz-520MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2112 1.0

Driver Amplifier operating from 37 - 40 GHz and can be used in Ka band applications or to drive the high-power amplifier. RFDA11C Driver Amplifier operates from 37 - 40 GHz and can be used in Ka band applications or to drive the high-power amplifier. The amplifier provide...

2113 1.0

Buffer Amplifier operating from 25-62.5 GHz and can be used in Ka / V band application or to drive the high power amplifier. RFBA01C Buffer Amplifier operates from 25-62.5 GHz and can be used in Ka / V band application or to drive the high power amplifier. The amplifier prov...

2114 1.0

RF SPDT Switch from 2-44 GHz used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation RFSW03C RF SPDT Switch is used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation....

2115 1.0

Single stage low noise amplifier from 2-6 GHz with flat gain, low Noise Figure, high isolation, stability. RFLN04C is a single stage low noise amplifier with flat gain, low Noise Figure, high isolation, stability. The LNA is designed to operate from 2-6 GHz...

2116 3.0

Low Jitter 1.25GHz to 2.5GHz Quadrature Output PLL Terminus Circuits offers High speed, low Jitter PLL with 1.25GHz to 2.5GHz output. The ring oscillator based PLL provides balanced quadrature output. ...

2117 3.0

12 Bit Low Power AD Converter The IP is a 12bit fully differential successive approximation analog-to-digital converter. With a clock frequency of 5MHz a sampling rate of 200kS/s i...

2118 3.0

16 Bit Sigma Delta AD Converter This macro-cell is a single-channel 16-bit oversampling ADC intended for digital audio bandwidth applications. Supplied with 1.2V, the analog and the ...

2119 3.0

14 Bit Sigma Delta AD Converter Full-Scale Differential input from -320mV to +320mV Independent Conversion Output Rate 17.6kHz Active and Standby Quiescent current modes Programmable...

2120 3.0

60GHz Low Noise Amplifier The 60 GHz LNA is a low noise amplifier designed for applications in the 57 – 64 GHz frequency range. This product is well suited for wireless LAN an...

2121 3.0

60 GHz Power Amplifier The 60 GHz PA is a power amplifier designed for applications in the 57 – 64 GHz frequency range. This product is well suited for wireless LAN and poi...

2122 0.0

UMC L65LP 65nm DDR DLL - 78MHz-390MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2123 5.0

ISO/IEC 14443 type A/B Analog Front End (AFE) compliant with the NFC standards The ISO 14443 Analog Front End (AFE) is a fully integrated analog IP intended for Proximity Integrated Circuit Card (PICC)....

2124 5.0

Fully-integrated temperature monitor The Temperature Monitor is a fully integrated analog IP supervising the junction temperature (TJ) of the device....

2125 5.0

Fully-integrated programmable clock generator IP with embedded frequency monitor The Secure Clock Generator is a fully integrated mixed-signal IP securing the clocked system against side-channel attacks....

2126 5.0

Positive and negative voltage-glitch detector protecting against fault-injection attacks The Voltage Glitch Detector is a fully integrated analog IP intended to monitor the voltage supply so as to protect the system against fault injection...

2127 5.0

Fully-integrated 32 KHz crystal oscillator with countermeasures against fault injection attacks The Secure Crystal Oscillator is a fully integrated analog IP generating a secure clock signal through the resonance of an external crystal....

2128 5.0

ISO/IEC 7816-3 Analog Front End The ISO 7816-3 Analog Front End (AFE) is a mixed-signal IP including five fully integrated I/O pads intended for both interface device (reader) and In...

2129 1.0

TSMC CL013LV 130nm Clock Generator PLL - 160MHz-800MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2130 1.0

TSMC CL018G 180nm Deskew PLL - 55MHz-275MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2131 1.0

TSMC CL018G 180nm Deskew PLL - 110MHz-550MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2132 1.0

TSMC CL018E 180nm Deskew PLL - 130MHz-650MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2133 0.0

GF L28HPP 28nm DDR DLL - 316MHz-1580MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2134 1.0

TSMC CL018E 180nm Deskew PLL - 65MHz-325MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2135 1.0

TSMC CL015G 150nm Deskew PLL - 130MHz-650MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2136 1.0

TSMC CL015G 150nm Deskew PLL - 65MHz-325MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2137 1.0

TSMC CL015LV 150nm Deskew PLL - 140MHz-700MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2138 1.0

TSMC CL015LV 150nm Deskew PLL - 70MHz-350MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2139 1.0

TSMC CL013G 130nm Deskew PLL - 136MHz-680MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2140 1.0

TSMC CL013G 130nm Deskew PLL - 68MHz-340MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2141 1.0

TSMC CL013LV 130nm Deskew PLL - 160MHz-800MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2142 1.0

TSMC CL013LV 130nm Deskew PLL - 80MHz-400MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2143 1.0

UMC L180G 180nm Deskew PLL - 100MHz-500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2144 0.0

GF L28HPP 28nm DDR DLL - 200MHz-1000MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2145 1.0

UMC L180G 180nm Deskew PLL - 50MHz-250MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2146 1.0

UMC L150HS 150nm Deskew PLL - 70MHz-350MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2147 1.0

UMC L130HS 130nm Deskew PLL - 160MHz-800MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2148 1.0

TSMC CL013LV 130nm Clock Generator PLL - 80MHz-400MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2149 1.0

TSMC CL013LV 130nm Clock Generator PLL - 320MHz-1600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2150 1.0

TSMC CL013G 130nm Clock Generator PLL - 68MHz-340MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...