Design & Reuse
5664 IP
2251
1.0
UMC L130SP 130nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2252
1.0
UMC L130SP 130nm DDR DLL - 57MHz-285MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2253
1.0
UMC L130HS 130nm DDR DLL - 104MHz-520MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2254
1.0
UMC L130HS 130nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2255
0.0
GF L55LP 55nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2256
1.0
TSMC CL018G 180nm DDR DLL - 56MHz-280MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2257
1.0
TSMC CL018G 180nm DDR DLL - 42MHz-210MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2258
1.0
TSMC CL018E 180nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2259
1.0
TSMC CL018E 180nm DDR DLL - 57MHz-285MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2260
1.0
TSMC CL015G 150nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2261
1.0
TSMC CL015G 150nm DDR DLL - 57MHz-285MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2262
1.0
TSMC CL015LV 150nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2263
1.0
TSMC CL015LV 150nm DDR DLL - 57MHz-285MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2264
1.0
TSMC CL013G 130nm DDR DLL - 68MHz-340MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2265
1.0
TSMC CL013G 130nm DDR DLL - 51MHz-255MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2266
0.0
GF L55LPE 55nm DDR DLL - 164MHz-820MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2267
1.0
TSMC CL013LV 130nm DDR DLL - 88MHz-440MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2268
1.0
TSMC CL013LV 130nm DDR DLL - 66MHz-330MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2269
1.0
TSMC CL013LVOD 130nm DDR DLL - 116MHz-580MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2270
1.0
TSMC CL013LVOD 130nm DDR DLL - 87MHz-435MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2271
1.0
TSMC CLN90G 90nm DDR DLL - 124MHz-620MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2272
1.0
TSMC CLN90G 90nm DDR DLL - 93MHz-465MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2273
1.0
GF L013HP 130nm Deskew PLL - 105MHz-525MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2274
1.0
GF L013HP 130nm Deskew PLL - 210MHz-1050MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2275
1.0
GF L013HP 130nm Deskew PLL - 420MHz-2100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2276
1.0
GF L013LV 130nm Deskew PLL - 75MHz-375MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2277
0.0
GF L55LPE 55nm DDR DLL - 104MHz-520MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2278
1.0
GF L013LV 130nm Deskew PLL - 150MHz-750MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2279
1.0
GF L013LV 130nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2280
1.0
GF L013N 130nm Deskew PLL - 60MHz-300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2281
1.0
GF L013N 130nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2282
1.0
GF L013N 130nm Deskew PLL - 240MHz-1200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2283
1.0
GF L013LP 130nm Deskew PLL - 45MHz-225MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2284
1.0
GF L018IB 180nm Deskew PLL - 55MHz-275MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2285
1.0
GF L018IB 180nm Deskew PLL - 110MHz-550MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2286
1.0
GF L018IB 180nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2287
1.0
GF L013LP 130nm Deskew PLL - 90MHz-450MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2288
0.0
GF L55LPE 55nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2289
1.0
GF L013LP 130nm Deskew PLL - 180MHz-900MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2290
1.0
GF L018IB 180nm Clock Generator PLL - 55MHz-275MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2291
1.0
GF L018IB 180nm Clock Generator PLL - 110MHz-550MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2292
1.0
GF L018IB 180nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2293
1.0
GF L013LP 130nm Clock Generator PLL - 45MHz-225MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2294
1.0
GF L013LP 130nm Clock Generator PLL - 90MHz-450MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2295
1.0
GF L013LP 130nm Clock Generator PLL - 180MHz-900MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2296
1.0
GF L013N 130nm Clock Generator PLL - 60MHz-300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2297
1.0
GF L013N 130nm Clock Generator PLL - 120MHz-600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2298
1.0
GF L013N 130nm Clock Generator PLL - 240MHz-1200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2299
15.0
Ultra-low quiescent LDO voltage regulator in TSMC 22ULL
Ultra-low quiescent LDO voltage regulator in TSMC 22ULL...
2300
0.0
TSMC CLN20SOC 20nm Multi Phase DLL - 700MHz-3500MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....