2851 0.0

TSMC CLN6FF 6nm DDR DLL - 188MHz-940MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2852 0.0

TSMC CLN6FFLVT 6nm DDR DLL - 568MHz-2840MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2853 0.0

TSMC CLN6FFLVT 6nm DDR DLL - 360MHz-1800MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2854 0.0

TSMC CLN6FFLVT 6nm DDR DLL - 270MHz-1350MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2855 0.0

UMC L110AELL 110nm DDR DLL - 32MHz-160MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2856 0.0

UMC L110AELL 110nm DDR DLL - 24MHz-120MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2857 0.0

UMC L28EHV 28nm DDR DLL - 205MHz-1025MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2858 0.0

UMC L28EHV 28nm DDR DLL - 130MHz-650MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2859 0.0

UMC L28EHV 28nm DDR DLL - 98MHz-490MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2860 0.0

UMC L28EHVLVT 28nm DDR DLL - 338MHz-1690MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2861 0.0

UMC L28EHVLVT 28nm DDR DLL - 214MHz-1070MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2862 0.0

UMC L28EHVLVT 28nm DDR DLL - 160MHz-800MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2863 0.0

UMC L28HPCLVT 28nm DDR DLL - 379MHz-1895MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2864 0.0

UMC L28HPCLVT 28nm DDR DLL - 240MHz-1200MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2865 0.0

UMC L28HPCLVT 28nm DDR DLL - 180MHz-900MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2866 0.0

TSMC CLN40FL 40nm Deskew PLL - 150MHz-750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2867 0.0

TSMC CLN40FL 40nm Deskew PLL - 75MHz-375MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2868 0.0

TSMC CLN40FL 40nm Deskew PLL - 37MHz-187MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2869 0.0

TSMC CLN40FLOD 40nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2870 0.0

TSMC CLN40FLOD 40nm Deskew PLL - 150MHz-750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2871 0.0

TSMC CLN40FLOD 40nm Deskew PLL - 75MHz-375MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2872 0.0

TSMC CLN4P 4nm Deskew PLL - 800MHz-4000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2873 0.0

TSMC CLN4P 4nm Deskew PLL - 400MHz-2000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2874 0.0

TSMC CLN4P 4nm Deskew PLL - 200MHz-1000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2875 0.0

TSMC CLN4PLVT 4nm Deskew PLL - 1200MHz-6000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2876 0.0

TSMC CLN4PLVT 4nm Deskew PLL - 600MHz-3000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2877 0.0

TSMC CLN4PLVT 4nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2878 0.0

TSMC CLN5P 5nm Deskew PLL - 800MHz-4000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2879 0.0

TSMC CLN5P 5nm Deskew PLL - 400MHz-2000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2880 0.0

TSMC CLN5P 5nm Deskew PLL - 200MHz-1000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2881 0.0

TSMC CLN5PLVT 5nm Deskew PLL - 1200MHz-6000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2882 0.0

TSMC CLN5PLVT 5nm Deskew PLL - 600MHz-3000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2883 0.0

TSMC CLN5PLVT 5nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2884 0.0

TSMC CLN6FF 6nm Deskew PLL - 800MHz-4000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2885 0.0

TSMC CLN6FF 6nm Deskew PLL - 400MHz-2000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2886 0.0

TSMC CLN6FF 6nm Deskew PLL - 200MHz-1000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2887 0.0

TSMC CLN6FFLVT 6nm Deskew PLL - 1200MHz-6000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2888 10.0

Temperature Sensor with Digital Output (High accuracy thermal sensing for reliability and optimisation), TSMC N6 A high precision low power junction temperature sensor that has been developed to be easily embedded into digital ASIC designs. The block features an ...

2889 0.0

Low-power XTAL 32 kHz oscillator in SF 65LFR6LP qOSC-XTAL-LP-32k-co.04_SF_65_LFR6LP is an ultra-low power 32 kHz XTAL oscillator in SF 65LFR6LP (eFlash process) for IoT applications and ULP MCU appl...

2890 0.0

TSMC CLN6FFLVT 6nm Deskew PLL - 600MHz-3000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2891 0.0

TSMC CLN6FFLVT 6nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2892 0.0

UMC L110AELL 110nm Deskew PLL - 120MHz-600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2893 0.0

UMC L110AELL 110nm Deskew PLL - 60MHz-300MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2894 0.0

UMC L110AELL 110nm Deskew PLL - 30MHz-150MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2895 0.0

UMC L28EHV 28nm Deskew PLL - 600MHz-3000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2896 0.0

UMC L28EHV 28nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2897 0.0

UMC L28EHV 28nm Deskew PLL - 150MHz-750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2898 0.0

UMC L28EHVLVT 28nm Deskew PLL - 900MHz-4500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2899 0.0

UMC L28EHVLVT 28nm Deskew PLL - 450MHz-2250MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2900 0.0

UMC L28EHVLVT 28nm Deskew PLL - 225MHz-1125MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...