3101 1.0

audio clock Generation, output nine kinds of 256*fs from 12M reference input This PLL is designed for audio clock generation. The reference clock is 12MHz crystal or input clock. It supports 256*fs clock output, here fs is audi...

3102 1.0

GSMC 0.18um 1.8v POR The present IP is a Power On Reset (POR) circuit without external resistors or capacitors. Its power supply is 1.8v....

3103 1.0

GSMC 0.18um Power-On Reset This is a Power-On-Reset circuit that generates a reset pulse when power supply is on. After the power V18 reaches a specific level, i.e., VTR, it wil...

3104 1.0

GSMC 0.18um 3.3v/1.8v Power Regulator Present project is a regulator that generates 1.8v voltage from 3.3v power supply. Based on the GSMC 0.18um 3.3v process, it provides a maximum curren...

3105 1.0

GSMC 0.18um 5v-3.3v/1.8v Power Regulator Based on GSMC 0.18um 3.3v/1.8v Logic process, current design of the Power Regulator is to provide both 3.3v and 1.8v power supplies which are regulate...

3106 1.0

GSMC 0.18um 1.8v RC Oscillator The present IP is a RC oscillator with one external resistor to generate 25~50 MHz clock. Its power supply is 1.8v....

3107 1.0

GSMC 0.18um 1.8v RC Oscillator The present IP is a RC oscillator with one external resistor to generate 25~50 MHz clock. Its power supply is 1.8v....

3108 1.0

GSMC 0.18um 1.8v Ring Oscillator The present IP is a Ring Oscillator. Its output frequency is about 55 MHz. The frequency can be fairly accurate (+/-10%) by trimming the resistance. I...

3109 1.0

GSMC 0.18um 1.8v Ring Oscillator The present IP is a Ring Oscillator. Its output frequency can be changed by adjusting the external resistor. Its power supply is 1.8v +/-10%. A bandga...

3110 1.0

GSMC 0.18um VCC Detector The present IP is a VCC Detector (VDT) circuit. It detects the voltage level of its power supplies, AV18 and AV33. The normal operation voltage levels...

3111 1.0

GSMC 0.18um Voltage Detector The present IP is a Voltage Detector (VDT) circuit. Its power supply is 2.7v~3.6v....

3112 1.0

GSMC 0.18um Voltage Detector The present IP devise a Voltage Detector (VDT) circuit. With the help of a 1.2v input reference, it detects both 3.3v and 1.8v input voltages and it w...

3113 1.0

SMIC 0.13um MMC Targeted in SMIC 0.13μm 1.2v/3.3v logic process, this IP integrates five sub-modules: 1.8~3.3v(1.62~3.6V) to 1.2v Regulator, 200MHz Ring Oscillator an...

3114 1.0

SMIC 0.18um Low Leakage Process SMIC18LL_VDD33SW_01, a 3.3V switchable power control block also called 3.3V power bypass control block, is developed by VeriSilicon and has been opti...

3115 1.0

UMC 0.18um 1.8v 60MHz Ring Oscillator The present IP is a Ring Oscillator which is controlled by the external 1.2v bandgap reference. Its output frequency is about 60MHz and it can be fair...

3116 1.0

GSMC 0.18um 3.3v-1.8v Power Regulator This is a 3.3V to 1.8V power regulator based on GSMC 0.18um 1.8V/3.3V D0 Process. In regulated region, the rated output current is <20mA....

3117 1.0

GSMC 0.18¦Ìm 1.8v/3.3v Power Switch The GSMC18_PSW_02 is a PMOS power switch between the main power supply and circuit cell. Its RON is 1ohm....

3118 1.0

GSMC 0.18um 3.3v RC Oscillator The present IP is a RC oscillator with internal R and C to generate 32¡À20%KHz clock. Its power supply is 3.3V....

3119 1.0

GSMC 0.18um VCC Detector The present IP is a VCC Detector (VDT) circuit which detects the core supply and then sends a corresponding control signal to level shift. In specific...

3120 1.0

GSMC 0.18um Voltage Detector This IP is a Voltage Detector (VDT) circuit for power management application. When the supply voltage (AVDD33) increases above the detection level (VT...

3121 1.0

SMIC 0.13um 1.2v/3.3v APLL This IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run from 100MHz to 300MHz (If the analog power drops...

3122 1.0

SMIC 0.13um 1.2v/3.3v PLL This PLL is designed for audio clock generation. The reference clock is 13.5MHz crystal or the input clock. It supports 256*fs clock output and 384*fs...

3123 1.0

SMIC 0.13um 1.2v/3.3v PLL Specification This PLL is designed for audio clock generation. The reference clock is either 12MHz crystal or the input clock. It supports 256*fs clock output, wher...

3124 1.0

SMIC 0.13um 1.2v APLL This IP is a programmable Analog PLL suitable for generating system clock. It contains a PFD, Charge pump, 3rd order loop filter, a 1-64 input clock d...

3125 1.0

SMIC 0.13um 3.3v/1.2v Power Regulator Present IP devises a NO-CAP regulator which generates 1.2V voltage from 3.3V power supply and provides100mA plus loading current. Targeted in the SMI...

3126 1.0

SMIC0.13um 3.3V POR The present IP is a Power On Reset (POR) circuit without any external resistor or capacitor. It supports a power supply range from 1.62V to 3.6V. A CL...

3127 1.0

SMIC 0.13um 3.3V Power On Reset Present Power on Reset generates system reset pulses (POR33) when the 3.3V power supplier (VIN33) is turned on. This IP can not operate stand-alone be...

3128 1.0

SMIC 0.18um 12-Bit 8 Input 1M/200k SAR ADC The analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution. The ADC includes a core intern...

3129 1.0

SMIC 0.18um 1.8v APLL This IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run from 50MHz to 400MHz. By setting DM [5:0] and DN...

3130 1.0

SMIC 0.18¦Ìm 5v-3.3v/1.8v Power Regulator Based on SMIC 0.18¦Ìm 3.3v/1.8v Logic process, this design of Power Regulator is to provide both 3.3v and 1.8v power supplies which are regulated from...

3131 1.0

SMIC 0.18¦Ìm 1.8v/3.3v Power Switch The SMIC18_PSW_01 is a PMOS power switch between the main power supply and isolation area. It can support up to 20mA current with less than 20 mV volt...

3132 1.0

SMIC 0.18um Stereo Speaker Drivers The SMIC18_SPKDRIVER_01 specifies the design of stereo speaker drivers. The drivers defined in this specification use class-AB structure to reduce pow...

3133 1.0

SMIC 0.18um 3.3v-1.8v Power Regulator Power Regulator, also called Voltage Regulator, is an on-chip device which provides the suitable power supply for the core from an external high volta...

3134 1.0

IBM10SF 1.0v/2.5v APLL Brief Specification This IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run from 150MHz to 500MHz. By setting DM (3:0) and D...

3135 1.0

IBM10SF 1.0v/2.5v APLL This IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run from 300MHz to 900MHz. By setting DM (3:0) and D...

3136 1.0

IBM 65nm 12-bit 1M/200K Single/Differential 2.5v Rail to Rail SAR ADC This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution. The ADC includes intern...

3137 1.0

IBM 65nm 1.0/2.5V 32768Hz Crystal Oscillator This is a 32768Hz crystal oscillator specifically designed for ultra-low power application. The sole power supply is 3.3V, but it can be as low as 1.6...

3138 1.0

IBM 65nm 3.3v-1.0v Power Regulator This IP is a 3.3V to 1.0V power regulator in IBM 65nm 1.0V/2.5V process. It supports a large Vdd range (1.62V~3.6V) and a large output capacitance ran...

3139 1.0

IBM 65nm Analog 2-1 MUX This analog 2-1 MUX is designed for low speed application....

3140 1.0

IBM10SF 1.0v/2.5v 10bit R2R DAC The I65GV25_R2RDAC_01 specifies a 10-bit R2R DAC. At the output side a voltage-mode buffer is used to generate the output voltage and filter out the e...

3141 1.0

IBM 10SF 65nm 2.5v PLL This PLL is designed for audio clock generation. The reference clock is 12MHz, 13.5MHz or 19.2MHz, which can be either from crystal OSC or from intern...

3142 1.0

IBM 65nm 24bit Sigma-Delta DAC The I65GV25_DAC_01 specifies the design of a high-performance 24-bit stereo Audio DAC for portable digital audio systems. The DAC within the specifica...

3143 1.0

IBM 65nm 24-bit Stereo Sigma-Delta ADC The I65GV25_ADC_01 specifies the design of a high-performance 24-bit stereo Audio ADC for portable digital audio systems. The ADC within the specifica...

3144 1.0

SMIC 0.13um 1Channel 10Bit 10MHz DAC S13V33_R2RDAC_01 is a 10bit@10MHz DAC IP which implements a 7-bit (from D [0] to D [6]) R2R_Ladder and 3-bit thermometer decoder architecture. At the ...

3145 1.0

SMIC 0.13um 1.2v/3.3v PLL This PLL is designed for audio clock generation. The reference clock is either 12MHz crystal or the input clock. It supports 256*fs and 128*fs clock o...

3146 1.0

SMIC 0.13um 1.2v APLL This IP is a programmable Analog PLL suitable for generating system clock. High speed VCO can run from 250MHz to 500MHz. By setting DM [5:0] and DN [7...

3147 1.0

SMIC 0.13um 1.2v FN-PLL This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run from 200MHz to 500MHz. It contains a 1-64 in...

3148 1.0

SMIC 0.13μm 1.62~3.3v->1.2v Power Regulator Targeted in SMIC 0.13μm 1.2v/3.3v logic process, current design of Power Regulator is to provide 1.2v power supply which is regulated from the single ...

3149 1.0

SMIC 0.13μm 1.62~3.3v->1.2v Power Regulator Targeted in SMIC 0.13μm 1.2v/3.3v logic process, current design of Power Regulator is to provide 1.2v power supply which is regulated from the single ...

3150 1.0

SMIC 0.13um 3.3V/1.2V Power on Reset The present Power-On-Reset circuit generates system reset pulses (RST) when both the 3.3V and 1.2V power suppliers are turned on. Output signal RST12 ...