Design & Reuse
5493 IP
4151
100.0
TSMC CLN7FF 7nm DDR DLL - 250MHz-1250MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4152
0.0
TSMC CLN7FF 7nm DDR DLL - 188MHz-940MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4153
0.0
TSMC CLN7FFLVT 7nm DDR DLL - 568MHz-2840MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4154
100.0
TSMC CLN7FFLVT 7nm DDR DLL - 360MHz-1800MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4155
0.0
TSMC CLN7FFLVT 7nm DDR DLL - 270MHz-1350MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4156
0.0
TSMC CLN16FFCLLLVT 16nm DDR DLL - 568MHz-2840MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4157
0.0
TSMC CLN16FFCLLLVT 16nm DDR DLL - 360MHz-1800MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4158
0.0
TSMC CLN16FFCLLLVT 16nm DDR DLL - 270MHz-1350MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4159
0.0
TSMC CLN16FF+LLLVT 16nm DDR DLL - 568MHz-2840MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4160
8.0
IGAPLLV10A, TSMC CLN12FFC Spread Spectrum Clock Generate Phase Lock Loop
IGAPLLV10A is a Spread Spectrum Phase Lock Loop (SSPLL), without external components and is designed to provide stable and accurate clock. The SSPLL i...
4161
0.0
TSMC CLN16FF+LLLVT 16nm DDR DLL - 360MHz-1800MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4162
0.0
TSMC CLN16FF+LLLVT 16nm DDR DLL - 270MHz-1350MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4163
0.0
TSMC CLN16FF+GLLVT 16nm DDR DLL - 568MHz-2840MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4164
0.0
TSMC CLN16FF+GLLVT 16nm DDR DLL - 360MHz-1800MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4165
0.0
TSMC CLN16FF+GLLVT 16nm DDR DLL - 270MHz-1350MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4166
0.0
TSMC CLN28HPC+LVT 28nm DDR DLL - 411MHz-2055MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4167
0.0
TSMC CLN28HPC+LVT 28nm DDR DLL - 260MHz-1300MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4168
0.0
TSMC CLN28HPC+LVT 28nm DDR DLL - 195MHz-975MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4169
0.0
TSMC CLN28HPCLVT 28nm DDR DLL - 379MHz-1895MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4170
0.0
028UMC_PVT_01 - Process/Voltage/Temperature Sensor (Supply voltage 1.8V/0.9V)
028UMC_PVT_01 IP library is a unique solution intended to continuously monitor IC status at several on-die locations. It is able to detect manufactu...
4171
8.0
IGARFCS05A, TSMC CLN40LP 120MHz Resistance to Frequency Converter
IGARFCS05A is a 120MHz resistance to frequency oscillator without external component. It is designed to provide a stable and accurate reference clock ...
4172
0.0
TSMC CLN28HPCLVT 28nm DDR DLL - 240MHz-1200MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4173
0.0
TSMC CLN28HPCLVT 28nm DDR DLL - 180MHz-900MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4174
0.0
GF L55LPX 55nm DDR DLL - 164MHz-820MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4175
0.0
GF L55LPX 55nm DDR DLL - 104MHz-520MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4176
3.0
Active Programmable Low Pass Filter
The WEA321250LPF25CH5ST55 is an active 5th order Chebyshev Low Pass filter, synthesized in a Leapfrog architecture. It has programmable cutoff frequen...
4177
0.0
GF L55LPX 55nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4178
0.0
TSMC CLN7FF 7nm Deskew PLL - 800MHz-4000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4179
30.0
TSMC CLN7FF 7nm Deskew PLL - 400MHz-2000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4180
0.0
TSMC CLN7FF 7nm Deskew PLL - 200MHz-1000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4181
0.0
TSMC CLN7FFLVT 7nm Deskew PLL - 1200MHz-6000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4182
8.0
IGATHMX01A, TSMC CLN7FF Thermal Sensor ADC
IGATHMX01A is a voltage/temperature sensor ADC which builds in internal thermal diode and Analog-to-Digital Converter (ADC) for both voltage and tempe...
4183
0.0
TSMC CLN7FFLVT 7nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4184
100.0
TSMC CLN7FFLVT 7nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4185
0.0
TSMC CLN16FFCLLLVT 16nm Deskew PLL - 1200MHz-6000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4186
0.0
TSMC CLN16FFCLLLVT 16nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4187
0.0
TSMC CLN16FFCLLLVT 16nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4188
0.0
TSMC CLN16FF+LLLVT 16nm Deskew PLL - 1200MHz-6000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4189
0.0
TSMC CLN16FF+LLLVT 16nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4190
0.0
TSMC CLN16FF+LLLVT 16nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4191
0.0
TSMC CLN16FF+GLLVT 16nm Deskew PLL - 1200MHz-6000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4192
0.0
TSMC CLN16FF+GLLVT 16nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4193
8.0
IGATHMT06A, TSMC CLN28HPM/28HPC/28HPC+ Thermal Sensor ADC
IGATHMT06A is a voltage and temperature sensor which is built in an internal thermal diode and an Analog-to-Digital Converter (ADC) for both voltage a...
4194
0.0
TSMC CLN16FF+GLLVT 16nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4195
0.0
TSMC CLN28HPC+LVT 28nm Deskew PLL - 900MHz-4500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4196
0.0
TSMC CLN28HPC+LVT 28nm Deskew PLL - 450MHz-2250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4197
0.0
TSMC CLN28HPC+LVT 28nm Deskew PLL - 225MHz-1125MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4198
0.0
TSMC CLN28HPCLVT 28nm Deskew PLL - 880MHz-4400MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4199
0.0
TSMC CLN28HPCLVT 28nm Deskew PLL - 440MHz-2200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4200
0.0
TSMC CLN28HPCLVT 28nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...