4501 0.0

TSMC CLN22ULP 22nm DDR DLL - 160MHz-800MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4502 6.0

12-bit, 8 GSPS High Performance Swift™ ADC in 16nm CMOS The ODT-ADS-12B8G-16 is an ultra high-performance time-interleaved 12-bit 8GSPS ADC on 16nm CMOS process. This Swift™ ADC supports input bandwidth sig...

4503 0.0

TSMC CLN22ULP 22nm DDR DLL - 120MHz-600MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4504 0.0

TSMC CLN22ULPLVT 22nm DDR DLL - 316MHz-1580MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4505 0.0

TSMC CLN22ULPLVT 22nm DDR DLL - 200MHz-1000MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4506 0.0

TSMC CLN22ULPLVT 22nm DDR DLL - 150MHz-750MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4507 0.0

TSMC CLN40ULPOD 40nm DDR DLL - 177MHz-885MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4508 0.0

TSMC CLN40ULPOD 40nm DDR DLL - 112MHz-560MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4509 0.0

TSMC CLN40ULPOD 40nm DDR DLL - 84MHz-420MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4510 1.0

Regulator, Tunable, 50mA, 3.3V - IHP 250nm SiGe Regulator, Tunable, 50mA, 3.3V - IHP 250nm SiGe...

4511 0.0

UMC L110HS 110nm DDR DLL - 104MHz-520MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4512 0.0

UMC L110HS 110nm DDR DLL - 78MHz-390MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4513 0.0

UMC L110LL 110nm DDR DLL - 32MHz-160MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4514 0.0

UMC L110LL 110nm DDR DLL - 24MHz-120MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4515 0.0

UMC L110SP 110nm DDR DLL - 76MHz-380MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4516 0.0

UMC L110SP 110nm DDR DLL - 57MHz-285MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4517 0.0

UMC L28HPC+ 28nm DDR DLL - 347MHz-1735MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4518 0.0

UMC L28HPC+ 28nm DDR DLL - 220MHz-1100MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4519 0.0

UMC L28HPC+ 28nm DDR DLL - 165MHz-825MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4520 0.0

UMC L28HPC+LVT 28nm DDR DLL - 411MHz-2055MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4521 1.0

Regulator, Tunable, 50mA, 4.8V - IHP 250nm SiGe Regulator, Tunable, 50mA, 4.8V - IHP 250nm SiGe...

4522 0.0

UMC L28HPC+LVT 28nm DDR DLL - 260MHz-1300MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4523 0.0

UMC L28HPC+LVT 28nm DDR DLL - 195MHz-975MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4524 0.0

UMC L28HPCLVT 28nm DDR DLL - 379MHz-1895MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4525 0.0

UMC L28HPCLVT 28nm DDR DLL - 240MHz-1200MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4526 0.0

UMC L28HPCLVT 28nm DDR DLL - 180MHz-900MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4527 0.0

GF L12LLP 12nm Deskew PLL - 500MHz-2500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4528 0.0

GF L12LLP 12nm Deskew PLL - 250MHz-1250MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4529 0.0

GF L12LLP 12nm Deskew PLL - 125MHz-625MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4530 0.0

GF L14LLP 14nm Deskew PLL - 500MHz-2500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4531 0.0

GF L14LLP 14nm Deskew PLL - 250MHz-1250MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4532 1.0

Low noise amplifier for GNSS - GlobalFoundries 130nm RFSOI Low noise amplifier for GNSS - GlobalFoundries 130nm RFSOI...

4533 0.0

GF L14LLP 14nm Deskew PLL - 125MHz-625MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4534 0.0

TSMC CLN12FFCLL 12nm Deskew PLL - 800MHz-4000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4535 0.0

TSMC CLN12FFCLL 12nm Deskew PLL - 400MHz-2000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4536 0.0

TSMC CLN12FFCLL 12nm Deskew PLL - 200MHz-1000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4537 0.0

TSMC CLN12FFCLLLVT 12nm Deskew PLL - 1200MHz-6000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4538 0.0

TSMC CLN12FFCLLLVT 12nm Deskew PLL - 600MHz-3000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4539 0.0

TSMC CLN12FFCLLLVT 12nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4540 0.0

TSMC CLN22ULP 22nm Deskew PLL - 500MHz-2500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4541 0.0

TSMC CLN22ULP 22nm Deskew PLL - 250MHz-1250MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4542 0.0

TSMC CLN22ULP 22nm Deskew PLL - 125MHz-625MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4543 1.0

Low Noise Amplifier, 2.36GHz-2.5GHz - GlobalFoundries 130nm RFSOI Low Noise Amplifier, 2.36GHz-2.5GHz - GlobalFoundries 130nm RFSOI...

4544 0.0

TSMC CLN22ULPLVT 22nm Deskew PLL - 700MHz-3500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4545 0.0

TSMC CLN22ULPLVT 22nm Deskew PLL - 350MHz-1750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4546 0.0

TSMC CLN22ULPLVT 22nm Deskew PLL - 175MHz-875MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4547 0.0

TSMC CLN40ULPOD 40nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4548 0.0

TSMC CLN40ULPOD 40nm Deskew PLL - 150MHz-750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4549 0.0

TSMC CLN40ULPOD 40nm Deskew PLL - 75MHz-375MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4550 0.0

UMC L110HS 110nm Deskew PLL - 320MHz-1600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...