Design & Reuse
5664 IP
4651
0.0
GF L12LLP 12nm Deskew PLL - 125MHz-625MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4652
0.0
GF L14LLP 14nm Deskew PLL - 500MHz-2500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4653
0.0
GF L14LLP 14nm Deskew PLL - 250MHz-1250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4654
1.0
Low noise amplifier for GNSS - GlobalFoundries 130nm RFSOI
Low noise amplifier for GNSS - GlobalFoundries 130nm RFSOI...
4655
0.0
GF L14LLP 14nm Deskew PLL - 125MHz-625MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4656
0.0
TSMC CLN12FFCLL 12nm Deskew PLL - 800MHz-4000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4657
0.0
TSMC CLN12FFCLL 12nm Deskew PLL - 400MHz-2000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4658
0.0
TSMC CLN12FFCLL 12nm Deskew PLL - 200MHz-1000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4659
0.0
TSMC CLN12FFCLLLVT 12nm Deskew PLL - 1200MHz-6000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4660
0.0
TSMC CLN12FFCLLLVT 12nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4661
0.0
TSMC CLN12FFCLLLVT 12nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4662
0.0
TSMC CLN22ULP 22nm Deskew PLL - 500MHz-2500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4663
0.0
TSMC CLN22ULP 22nm Deskew PLL - 250MHz-1250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4664
0.0
TSMC CLN22ULP 22nm Deskew PLL - 125MHz-625MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4665
1.0
Low Noise Amplifier, 2.36GHz-2.5GHz - GlobalFoundries 130nm RFSOI
Low Noise Amplifier, 2.36GHz-2.5GHz - GlobalFoundries 130nm RFSOI...
4666
0.0
TSMC CLN22ULPLVT 22nm Deskew PLL - 700MHz-3500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4667
0.0
TSMC CLN22ULPLVT 22nm Deskew PLL - 350MHz-1750MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4668
0.0
TSMC CLN22ULPLVT 22nm Deskew PLL - 175MHz-875MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4669
0.0
TSMC CLN40ULPOD 40nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4670
0.0
TSMC CLN40ULPOD 40nm Deskew PLL - 150MHz-750MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4671
0.0
TSMC CLN40ULPOD 40nm Deskew PLL - 75MHz-375MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4672
0.0
UMC L110HS 110nm Deskew PLL - 320MHz-1600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4673
0.0
UMC L110HS 110nm Deskew PLL - 160MHz-800MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4674
0.0
UMC L110HS 110nm Deskew PLL - 80MHz-400MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4675
0.0
UMC L110LL 110nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4676
1.0
Low-Noise Amplifier (Single-ended cascode) - GlobalFoundries 22nm
Low-Noise Amplifier (Single-ended cascode) - GlobalFoundries 22nm...
4677
0.0
UMC L110LL 110nm Deskew PLL - 60MHz-300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4678
0.0
UMC L110LL 110nm Deskew PLL - 30MHz-150MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4679
0.0
UMC L110SP 110nm Deskew PLL - 236MHz-1180MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4680
0.0
UMC L110SP 110nm Deskew PLL - 118MHz-590MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4681
0.0
UMC L110SP 110nm Deskew PLL - 59MHz-295MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4682
0.0
UMC L28HPC+ 28nm Deskew PLL - 720MHz-3600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4683
0.0
UMC L28HPC+ 28nm Deskew PLL - 360MHz-1800MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4684
0.0
UMC L28HPC+ 28nm Deskew PLL - 180MHz-900MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4685
0.0
UMC L28HPC+LVT 28nm Deskew PLL - 900MHz-4500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4686
0.0
UMC L28HPC+LVT 28nm Deskew PLL - 450MHz-2250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4687
1.0
Loop Filter, Tunable BandWidth, Embedded 10bit ADC/DAC, Lbw=200kHz - GlobalFoundries 40nm
Loop Filter, Tunable BandWidth, Embedded 10bit ADC/DAC, Lbw=200kHz - GlobalFoundries 40nm...
4688
0.0
UMC L28HPC+LVT 28nm Deskew PLL - 225MHz-1125MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4689
0.0
UMC L28HPCLVT 28nm Deskew PLL - 880MHz-4400MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4690
0.0
UMC L28HPCLVT 28nm Deskew PLL - 440MHz-2200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4691
0.0
UMC L28HPCLVT 28nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4692
0.0
GF L12LLP 12nm General Purpose PLL - 250MHz-1250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4693
0.0
GF L14LLP 14nm General Purpose PLL - 250MHz-1250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4694
0.0
TSMC CLN12FFCLL 12nm General Purpose PLL - 400MHz-2000MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4695
0.0
TSMC CLN12FFCLLLVT 12nm General Purpose PLL - 600MHz-3000MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4696
0.0
TSMC CLN22ULP 22nm General Purpose PLL - 250MHz-1250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4697
0.0
TSMC CLN22ULPLVT 22nm General Purpose PLL - 350MHz-1750MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4698
1.0
Loop Filter, Tunable BW, Embedded 5bit ADC/DAC, Loop BW=200kHz - GlobalFoundries 55nm
Loop Filter, Tunable BW, Embedded 5bit ADC/DAC, Loop BW=200kHz - GlobalFoundries 55nm...
4699
0.0
TSMC CLN40ULPOD 40nm General Purpose PLL - 150MHz-750MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4700
0.0
UMC L28HPC+ 28nm General Purpose PLL - 360MHz-1800MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...