501 1.0

LPDDR4X/4/DDR4/LPDDR3 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal LPDDR4/4X/DDR4/LPDDR3 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compat...

502 1.0

DDR4/3/LPDDR4X/4/3 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/LPDDR4/4X/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...

503 1.0

DDR4/LPDDR4/3 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal DDR4/LPDDR4/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatib...

504 1.0

LPDDR3/2 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal LPDDR3/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SD...

505 1.0

LPDDR3/2/DDR3/3L Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal LPDDR2/3/DDR3/3L COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compa...

506 1.0

LPDDR3/2/DDR3/3L/2 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal LPDDR3/2/DDR3/3L/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...

507 1.0

LPDDR2 PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal LPDDR2 PHY provides turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devi...

508 1.0

DDR4/3/LPDDR4/3 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/LPDDR4/4X/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...

509 0.3729

1.8V Secondary Oxide DDRx & LPDDRx Combo I/O Interface - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF Dolphin Technology's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR4/3/2, LPDDR3/2, DDR PHY, LVDS, LVPECL, I2...

510 1.0

DDR4/3/3L/LPDDR3 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/3L/LPDDR3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compa...

511 1.0

DDR4/LPDDR4/4X/3 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal DDR4/LPDDR4/4X/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compa...

512 1.0

DDR4/LPDDR4X/4 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal LPDDR4/4X/DDR4 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SD...

513 1.0

DDR4/3/LPDDR3 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/LPDDR3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatib...

514 1.0

DDR3/3L/2/LPDDR3/2 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal DDR3/3L/2/LPDDR3/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...

515 1.0

DDR4/3/2 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/2 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM de...

516 1.0

DDR3/3L/2 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal DDR3/3L/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible S...

517 1.0

DDR4/3 Combo PHY & Controller The INNOSILICON DDR IPTM Mixed-Signal DDR4/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRA...

518 1.0

PSRAM PHY The INNOSILICON DDR IPTM Mixed-Signal PSRAM PHY provides turnkey physical interface solutions for ICs requiring access to JEDEC compatible PSRAM devic...

519 1.0

INNOLINK-B Controller The INNOLINK Controller (ILC) combined with INNOLINK PHY is a complete solution for high speed data communication between dies or chips. INNOLIN, GDDR...

520 0.3729

1.8V,2.5V Secondary Oxide DDRx/LPDDRx PHY - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...

521 1.0

INNOLINK-C PHY Innosilicon can provide different Die-to-Die and Chip-to-Chip solutions for customer according to package types. The followings are Innosilicon Die-to...

522 1.0

INNOLINK-C Controller The INNOLINK-C Controller (hereinafter referred to as “ILC”) combined with INNOLINK-C PHY is a complete solution for high-speed data communication bet...

523 1.0

GDDR7 PHY & Controller The INNOSILICON™ GDDR7 PHY is fully compliant with the JEDEC GDDR7 standard, supporting data rates of up to 32 Gbps in PAM3 mode. In PAM3 mode, each b...

524 1.0

eMMC/SD/SDIO PHY & Controller INNOSILICON™ eMMC/SD/SDIO Combo IP is a comprehensive solution designed to support high-performance storage and I/O connectivity for a wide range of a...

525 0.118

Memory Controller IP, Memory Stick controller, Soft IP Memory Stick host controller with AHB Bus....

526 0.118

Memory Controller IP, NAND Flash memory Host controller, Soft IP NAND flash host controller with AHB interface, it supports SLC and MLC NAND flash....

527 10.0

NAND Flash Memory Controller with DMA NANDFCTRL2 is a VHDL IP core implementing an interface to NAND flash memory devices. The core supports ONFI 4.0 and provides DMA transfers to and from...

528 4.0

Advanced Flash Controller Interface Core The IPC-BL157A-ZM, Advanced Flash Controller Interface (AFCI) is a register level interface that allows software and hardware state machines the abili...

529 30.0

Universal NandFlash Controller IP-Maker's Universal NAND Flash Controller (IPM-UNFC) IP core is designed specifically to enable commodity Flash memory to be effectively used in ente...

530 0.3729

Supporting ONFI 5.0, 4.2, 4.1, 4.0 and ONFI 3 - TSMC 4nm 4FF/4P Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...

531 0.3729

SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF Dolphin s hardened DDRx SDRAM PHY and LPDDRx SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 1600 Mbps. It is fully compliant with...

532 0.3729

Supporting ONFI 5.0, 4.2, 4.1, 4.0 and ONFI 3 - TSMC 3nm Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...

533 0.118

Compact Flash host interface controller with APB interface. ...

534 0.118

Secure digital card host controller with APB interface. Secure digital card host controller with APB interface....

535 0.118

SD Host Controller IP, SD host spec. v3.0, SDIO spec. v2.0, MMC spec. v4.3, Supports UHS50/UHS104 card, Soft IP SD host controller wih ahb interface, compliant with the SD Host Controller Standard Specification Version 3.00....

536 0.0

DMA - DDMA - Direct Memory Access Controller The DDMA is a four-channel Direct Memory Access Controller. Its purpose is to transfer data between memories and peripherals to reduce CPU utilization...

537 0.118

Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high density, UMC 0.18um LL process UMC 0.18um LL Logic process synchronous high density Single Port SRAM memory compiler....

538 0.118

Single Port SRAM Compiler IP, UMC 0.15um SP process UMC 0.15um SP Logic process synchronousultra high speed Single Port SRAM memory compiler....

539 0.118

Single Port SRAM Compiler IP, UMC 0.13um SP/FSG process UMC 0.13um SP/FSG Logic process high density synchronous high density Single Port SRAM memory compiler....

540 0.118

Single Port SRAM Compiler IP, UMC 0.13um HS/FSG process UMC 0.13um HS/LL fusion (FSG) process high density synchronous high density Single Port SRAM memory compiler....

541 0.118

Single Port SRAM Compiler IP, UMC 0.13um CIS process UMC 0.13um CMOS Image Sensor process synchronous high density Single Port SRAM memory compiler....

542 10.0

DDR4 multiPHY in Samsung (14nm) The Synopsys DDR4 multiPHY is a complete physical (PHY) layer IP interface solution for PC/consumer and mobile ASICs, ASSPs, system-on- chip (SoC), an...

543 0.3729

DDRI/II/III SSTL/HSTL combo interface with/without RTT (rectangle) - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...

544 0.118

Single Port SRAM Compiler IP, UMC 0.15um SP process UMC 0.15um SP Logic process synchronous high density Single Port SRAM memory compiler....

545 0.0

Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high density, UMC 0.18um HV process UMC 0.18um high voltage 1.8V process synchronous high density Single Port SRAM memory compiler....

546 0.118

Single Port SRAM Compiler IP, UMC 90nm LL process UMC 90nm LL/RVT Synchronous high density Single Port SRAM memory compiler....

547 0.118

Flash Memory Controller IP, Support NAND type Flash memory of 8MB - 2 GB, 24 ECC bits per 512 bytes, Soft IP NAND-type Flash Controller with AHB interface which supports page size for 512B and 2KB, data width for 8/16-Bit and DMA handshaking protocol....

548 0.118

Single Port SRAM Compiler IP, UMC 65nm SP process UMC 65nm standard performance Logic process synchronous extra high speed Single Port SRAM memory compiler....

549 0.118

Single Port SRAM Compiler IP, UMC 90nm SP process UMC 90nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler....

550 0.118

Single Port SRAM Compiler IP, UMC 0.162um G2 process UMC 0.162um GII Logic process synchronous high density Single Port SRAM memory compiler....