901 0.0

LPDDR5X 7nm/6nm PHY The InPsytech LPDDR5x PHY is a high-performance, low-power physical interface IP designed for seamless integration into any System-on-Chip (SoC). It c...

902 0.0

LPDDR5X PHY 3nm The InPsytech LPDDR5x PHY is a high-performance, low-power physical interface IP designed for seamless integration into any System-on-Chip (SoC). It c...

903 0.0

LPDDR5X PHY 5nm/4nm The InPsytech LPDDR5x PHY is a high-performance, low-power physical interface IP designed for seamless integration into any System-on-Chip (SoC). It c...

904 0.0

LPDDR5X/5/4X COMBO PHY The LPDDR5x, LPDDR5, and LPDDR4x Combo PHY is designed for seamless integration into any System-on-Chip (SoC) and can easily connect to a third-party ...

905 100.0

SD 4.1 / SDIO 4.0 / eMMC 5.1 Host Controller Arasan Chip Systems’ eMMC 5.0 / SD3.0 Host Controller IP (3MCR) is a highly integrated host controller IP solution that supports three key memory and ...

906 0.0

ONFI 5.1 3,600MT/s PHY, 28nm, 12nm and 7nm The EGIS ONFI PHY is a mass production-proven, high-performance ONFI PHY IP designed to meet the stringent requirements of next-generation NAND Flash ...

907 0.0

ONFI 6.0 4,800MT/s PHY IP on 7nm and 6nm The InPsytech ONFI 4,800 PHY is a silicon-proven, high-performance ONFI PHY IP designed to meet the stringent requirements of next-generation NAND Fla...

908 0.0

DDR5 CKD 01 - Clock Driver MAXVY DDR5CKD01 is a high-performance FPGA-proven registering clock driver designed for DDR5 CUDIMM, CSODIMM, and CAMM applications, providing relia...

909 1.0

eMMC 5.1 HS400 PHY and I/O Pads in TSMC 40LP-EW Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...

910 10.0

TSMC DDR3/4 & LPDDR3/4/4x Combo IP with Controller + PHY This combo IP solution supports DDR3/DDR4 and LPDDR3/LPDDR4/LPDDR4x memory standards, designed for high performance and low power applications on TSMC...

911 10.0

TSMC DDR3/4 & LPDDR3/4 Combo IP with AXI and DFI 4.0 Interface This DDR3/4 and LPDDR3/4 IP combo solution integrates both controller and PHY, designed for TSMC 22nm process. It offers high-performance data rates u...

912 0.0

UCIe Chiplet PHY & Controller in Samsung (8nm, 10nm, 14nm) INNOSILICON™ UCIe Chiplet IP offers a customizable solution for seamless, low-latency data transfer between silicon dies and chips, enabling heterogen...

913 0.0

UCIe Chiplet PHY & Controller in TSMC (3nm, 4nm, 5nm, 7nm, 10nm, 12nm, 16nm) INNOSILICON™ UCIe Chiplet IP offers a customizable solution for seamless, low-latency data transfer between silicon dies and chips, enabling heterogen...

914 0.0

UCIe Chiplet PHY & Controller in SMIC (14 nm) INNOSILICON™ UCIe Chiplet IP offers a customizable solution for seamless, low-latency data transfer between silicon dies and chips, enabling heterogen...

915 0.0

UCIe Chiplet PHY & Controller in Global Foundries (12 nm, 14 nm) INNOSILICON™ UCIe Chiplet IP offers a customizable solution for seamless, low-latency data transfer between silicon dies and chips, enabling heterogen...

916 130.0

LPDDR6, LPDDR5X Combo PHY & Controller INNOSILICON™ introduces its LPDDR6/5X PHY and Controller IP, purpose-built for the AI era’s high-performance chip design needs. This solution is fully...

917 5.0

AGILEX 7 R-Tile NVME HOST IP Gen5 NVMe Host IP on AGILEX7 R-Tile It enables random access, sequential access, Read/Write access and multi-user access. To show these features, s...

918 1.0

eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28 HPC-EW Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...

919 0.0

AXI64 5 Port SRAM Controller The AXI 5-Master component SRAM Controller provides 5 AXI 64-bit Master components with low-wait-state access to a single internal 64-bit SRAM resourc...

920 0.0

Synopsys DDR5 MRDIMM2 PHY IP for TSMC N3P The Synopsys DDR5 MRDIMM2 PHY IP is part of a complete IP solution including PHY and Controller enabling ASIC, Application-specific standard products ...

921 0.0

Synopsys LPDDR6/5X/5 PHY IP for TSMC N3P The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...

922 0.0

LPDDR6/5X/5 PHY V2 in TSMC (N6, N6C, N5, N4P, N4C, N3P, N2P) The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...

923 0.0

LPDDR6/5X/5 PHY in TSMC (N3P, N2P) The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...

924 0.0

Synopsys LPDDR6/5X/5 PHY IP for TSMC N2P The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...

925 5.0

NOE SAN IP Enabling Remote-Attached Storage on FPGA-Based Embedded Systems over 10G/25G/50G/100G/200G/400GbE The NOE_SAN_IP adopts an open SAN protocol named AT...

926 0.0

Synopsys HBM4 IP for TSMC N3P Synopsys offers a complete HBM4 PHY IP solution for high-performance computing (HPC), AI, graphics, and networking ASIC, Application-Specific Standard...

927 5.0

eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPC-NS Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...

928 0.0

HBM4 PHY V2 (Hard) for TSMC (N3P, N2P) Synopsys offers a complete HBM4 PHY IP solution for high-performance computing (HPC), AI, graphics, and networking ASIC, Application-Specific Standard...

929 0.0

HBM4 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM4 standard The Synopsys HBM4 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM4 standard. It interoperates with Synops...

930 20.0

Arasan xSPI + eMMC Combo PHY IP This IP integrates both xSPI (Expanded Serial Peripheral Interface) and eMMC 5.1 PHY (Physical Layer) into a single unified solution, enabling support...

931 200.0

HBM4E Memory Controller The Rambus HBM4E Controller Core is designed for use in applications requiring high memory throughput, low latency, and full programmability. The c...

932 0.0

Synopsys Controller IP for cHBM4 The Synopsys HBM4 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM4 standard. It interoperates with Synops...

933 0.0

DDR5 MRDIMM3 PHY in TSMC (N2P) The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...

934 0.0

LPDDR6/5X/5 Controller IP Synopsys LPDDR6/5X/5 Controller IP is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR6...

935 0.0

Synopsys DDR5 PHY IP for TSMC N4C The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...

936 0.0

HBM4E/4/3E Combo PHY in SF4X SkyeChip’s High Bandwidth Memory (HBM) IP consists of a PHY and memory controller optimized for Samsung 4nm process to support the HBM4/3E memory stan...

937 0.0

eSPI Master IP SmartDV’s eSPI (Enhanced Serial Peripheral Interface) Master IP is a silicon-proven solution that enables reliable and efficient communication with mu...

938 0.0

eSPI Slave IP SmartDV’s eSPI (Enhanced Serial Peripheral Interface) Slave IP is a silicon-proven solution designed to enable efficient, low-pin-count communication ...

939 0.0

DFI LPDDR5 PHY IP DFI LPDDR5 is full-featured, easy-to-use, synthesizable design, compatible with LPDDR5 JESD209-5 specification and DFI-version 5.0 Compliant. Through ...

940 0.0

eMMC Device IP SmartDV’s eMMC (embedded MultiMediaCard) Device IP is a silicon-proven, high-performance solution designed for embedded storage applications across mo...

941 0.0

eMMC Host IP SmartDV’s eMMC (embedded MultiMediaCard) Host IP is a silicon-proven solution tailored for high-performance storage interfaces in mobile, automotive, ...

942 0.0

eSPI Slave to LPC Bridge IP SmartDV’s eSPI Slave to LPC Bridge IP is a silicon-proven solution that enables seamless interoperability between next-generation systems using eSPI (...

943 0.0

Controller for DDR LPDDR5/4X/4/3 and DDR5/4/3L/3, to 6400Mbps and beyond The Cadence Denali Controller IP for LPDDR5/4X/4/3 and DDR5/4/3L/3 provides low latency and u...

944 0.0

Controller for GDDR6 GDDR6 devices to 16Gbps, 18Gbps, 20Gbps, and beyond The latest, the Cadence Denali Controller IP for GDDR6, provides low latency and very high band...

945 0.0

DDR4/3 Memory PHY for GLOBALFOUNDRIES Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the Denali...

946 0.0

DDR4/3 Memory PHY for TSMC Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the Denali...

947 0.0

DDR4/3 Memory PHY for UMC Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the Denali...

948 0.0

DDR5 Memory PHY for GLOBALFOUNDRIES at 4.8Gbps Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...

949 0.0

DDR5 Memory PHY for Samsung at 4.8Gbps Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...

950 0.0

DDR5 Memory PHY for Samsung at 9.6Gbps Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...