551 10.0

MIPI D-PHY TSMC 28nm HPC+ @ 2.5Ghz The Arasan’s MIPI D-PHY Analog Transceiver IP Core is fully compliant to the D-PHY specification version 1.1. It supports the MIPI® Camera Serial Inte...

552 2.0

MIPI D-PHY TSMC 40LP Renesas- Automotive Grade Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...

553 2.0

MIPI D-PHY SMIC 40nm Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...

554 0.0

MIPI D-PHY UMC 40LL Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...

555 1.0

USB 2.0 PHY TSMC 55LP The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use...

556 1.0

USB 2.0 PHY TSMC 40LPeDRAM The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use...

557 1.0

USB 2.0 PHY I/O in GF40nm The Arasan Superspeed Inter-chip Controller (USB 3.0 SSIC Adapter) uses Arasan’s MIPI-M-PHY (Type-1) v. 3.0 to implement the SSIC adaptation to the US...

558 1.0

MIPI UniPro Stack - v1.6 To address the explosive growth in the mobile industry, the Mobile Industry Processor Interface (MIPI) Alliance was created to define and promote open...

559 2.0

MIPI D-PHY Digital Front-End for FPGA Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...

560 25.0

MIPI C-PHY V1.1 TSMC 28nm HPC+ Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.1 improves throughput over a bandwidth limited channel, allowing more data without in...

561 10.0

USB 2.0 femtoPHY in UMC (28nm, 22nm) The Synopsys IP USB 2.0 femtoPHY provides designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications su...

562 2.0

MIPI M-PHY - UMC 40nm MIPI M-PHY Specification Version 3.0 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. A M-PHY config...

563 100.0

MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm) Arasan's MIPI C-PHY is designed and compliant with latest MIPI C-Phy Standards. The MIPI C-PHY V1.2 improves throughput over a bandwidth-limited ch...

564 3.0

UHS-II PHY for SD4/SD5 TSMC 16nm FF SD 4.0 (UHS-II) achieves a peak interface speed of 3.12 Gbps. Arasan’s UHS-II PHY is compliant with the specification of UHS-II and is an extremely ar...

565 3.0

UHS-II PHY for SD4/SD5 TSMC 12nm FF SD 4.0 (UHS-II) achieves a peak interface speed of 3.12 Gbps. Arasan’s UHS-II PHY is compliant with the specification of UHS-II and is an extremely ar...

566 100.0

MIPI DSI Receiver Controller v1.3 The Arasan DSI Device Controller IP is designed to provide MIPI compliant high speed serial connectivity for mobile display modules with Type 1 to 4 a...

567 100.0

MIPI DSI Transmit Controller v1.3 The Arasan DSI Transmit Controller IP is designed to provide MIPI DSI 1.3 compliant high speed serial connectivity for mobile host processors using 1 ...

568 1.0

UFS 3.0 Host Controller compatible with M-PHY 4.0 and UniPro 1.8 Arasan's Universal Flash Storage 3.0 (UFS 3.0) is a simple but high performance, serial interface primarily used in mobile systems, between host proce...

569 1.0

UFS Host 3.0 Prototyping Kit (HDK )Total IP in a Box Universal Flash Storage (UFS) is a simple, high performance, mass storage device with a serial line interface. UFS is designed to be the most advanced...

570 1.0

UFS Host 2.1 Prototyping Kit (HDK )Total IP in a Box Universal Flash Storage (UFS) is a simple, high performance, mass storage device with a serial line interface. UFS is designed to be the most advanced...

571 10.0

USB 2.0 femtoPHY in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, 10nm, N7, N6, N6C, N5, N3P) The Synopsys IP USB 2.0 femtoPHY provides designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications su...

572 100.0

MIPI CSI-2 controller Receiver v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1. The Arasan MIPI CSI-2 Receiver IP Core functions as a MIPI Camera Serial Interface Receiver, between a peripheral device (Camera module) and a host pr...

573 75.0

MIPI CSI DSI Controller - CPHY CSI-2 Transmitter v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1. The Arasan MIPI CSI-2 Transmitter IP Core functions as a MIPI Camera Serial Interface between a peripheral device (display module) and a host processo...

574 10.0

MIPI M-PHY G4 Designed For TSMC 28nm HPC+ ACS-AIP-MPHY-28HPC+ MIPI Specification Version 4.1 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. ...

575 100.0

MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm) Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.2 improves throughput over a bandwidth limited channel, allowing more data without in...

576 10.0

D-phy 1.2 on tsmc 22nm with ultra low power Arasan Chip Systems announces the immediate availability its MIPI D-PHY IP supporting speeds of upto 2.5 gbps for TSMC 22nm SoC designs. The MIPI D-...

577 0.0

MIPI Soundwire PHY The physical layer block implements all the line-side functions such as NRZI encoding & decoding, bus clash detection, data line buffer enable/disable...

578 10.0

MIPI I3C PHY I/O Arasan’s MIPI I3CⓇ PHY I/O IP, in compliance with MIPI I3CⓇ specifications v1.1. Arasan’s MIPI I3CⓇ PHY IP is part of Arasan’s Total IP Solution for M...

579 10.0

USB 2.0 femtoPHY in Samsung (14nm, 11nm, 8nm, 7nm, 5nm, SF4X, SF4A) The Synopsys IP USB 2.0 femtoPHY provides designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications su...

580 100.0

Globalfoundries 12nm MIPI D-PHY V1.2@2.5GHz Arasan Chip Systems announces the immediate availability of its MIPI D-PHY(SM) Globalfoundries 12nm FinFET process nodes. Arasan's D-PHY Global Foun...

581 0.0

MIPI D-PHY V1.2@2.5GHz Tx only Arasan has the industry’s broadest portfolio of foundry and process technology support for MIPI D-PHY in the industry. The MIPI D-PHY analog IP is ava...

582 50.0

MIPI DSI-2 Receiver Controller v1.0 The Arasan DSI-2 Device Controller IP is designed to provide MIPI DSI-2 1.0 compliant high speed serial connectivity for mobile display modules with T...

583 0.0

Globalfoundries 12nm MIPI D-PHY Tx only V1.2@2.5GHz Arasan Chip Systems standalone MIPI D-PHY(SM) Transmit only for Globalfoundries 12nm FinFET process nodes. Arasan's standalone D-PHY Tx only for Glo...

584 0.0

Globalfoundries 12nm MIPI D-PHY Rx only V1.2@2.5GHz Arasan Chip Systems standalone MIPI D-PHY(SM) Recieve (Rx) only for Globalfoundries 12nm FinFET process nodes. Arasan's standalone D-PHY Rx only for...

585 40.0

MIPI RFFE Master Controller IP Core v3.0 Mobile radio communication systems are complex multi-radio systems comprising several transceivers. Arasan supports the latest MIPI RFFE standard v3.0...

586 1.0

MIPI RFFE Slave Controller IP Core v3.0 Mobile radio communication is trending towards complex multi-radio systems comprising several transceivers. Arasan supports the latest MIPI RFFE stand...

587 50.0

UFS 4.0 Host Controller compatible with M-PHY 5.0 and UniPro 2.0 The Arasan UFS Host -UniPro IP is a simple, high performance, serial interface used primarily in mobile systems between host processing and NVM mass s...

588 0.0

VESA DSC V1.2 Encoder The Arasan’s VESA DSC v1.2 Encoder IP core compresses high-definition streams in real time at resolutions ranging from 480 to 8K. The core supports 8,...

589 0.0

MIPI DSI-2 with VESA DSC Arasan’s Total IP Solution for MIPI Display Serial Interface (DSI-2) with VESA DSC IP provides both device and host functionality along with VESA DSC ...

590 50.0

USB 2.0 nanoPHY in SMIC (65nm) The Synopsys USB 2.0 nanoPHY provides designers with a complete Physical Layer (PHY) IP solution, designed for low-power mobile and consumer applicati...

591 0.0

MIPI DSI-2 Transmit Controller v2.0 Arasan’s Display Host and DSI device controllers are built on existing MIPI Alliance standards by adopting pixel formats, controlling pins and comma...

592 0.0

MIPI SPMI 2.0 Device IP Arasan’s SPMI Device IP (Configurable Controller Cores) implements MIPI SPMI2.0 protocols. It is designed to be configured as a SPMI Host, SPMI Device...

593 0.0

IGASERT08A, Derivative IP of IGPSERT12A Lane-based 1 - 12.5 Gbps Enterprise Multi-Standard SerDes The GUC's EMS-PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include 1GE, XAUI, RXAUI, XFI, 10GBase-KR...

594 8.0

TSMC CLN5FF Glink 2.0 Die-to-Die PHY IGAD2DY01A is a high speed die-to-die interface PHY which transmits data through TSMC advanced packaging solutions：Integrated Fan-Out (InFO) with RDL ...

595 0.0

TSMC CLN6FF/7FF Die-to-Die Interface PHY This IGAD2DX01A test report shows the functional and characterization test result of GUC Die-to-Die Interface PHY IP for 8 Gbps operation. For IP deta...

596 0.0

TSMC 12FFC Lane-based 1.25 - 22.5 Gbps Enterprise Multi-Standard SerDes The GUC's EMS-PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include PCIe Gen1-Gen4, SAS-4 G1-G5 and a...

597 0.0

TSMC N7FF 25.78125Gbps Enterprise SerDes The receiver equalizes and recovers incoming serial data and de-serializes the data stream into selectable 32/40/64 bit-wide data bus. The transmitter...

598 0.0

GLink Multi-Slice PCS GLink Multi-Slice PCS (IGDD2D004A) is a digital IP used to provide data bus alignment between different GLink Slices to ensure consistent data arrivin...

599 0.0

GLink AXI Wrapper GLink (GLink-fs 2.x + PCS-replay) AXI Wrapper is a digital IP designed to support AMBA AXI3/AXI4 compliant bus of user interface and provide data bus ...

600 0.0

GLink CXS-Bridge GLink (GLink-fs 2.x + PCS-replay) CXS-Bridge is a digital IP to interconnect between two dies that use Glink as a physical layer and provides AMBA CXS...