601 10.0

USB 2.0 nanoPHY in TSMC (65nm, 55nm, 40nm) The Synopsys USB 2.0 nanoPHY provides designers with a complete Physical Layer (PHY) IP solution, designed for low-power mobile and consumer applicati...

602 0.0

GLink Multi-Slice PCS GLink Multi-Slice PCS (IGPD2D001A) is a digital IP used to provide data bus alignment between different GLink Slices to ensure consistent data arrivin...

603 0.0

TSMC CLN12FFC Lane-based 1.5 - 16 Gbps Enterprise Multi-Standard SerDes The GUC's EMS-PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include PCIe Gen1-Gen4,SAS-3 G1-G4, SATA-...

604 0.0

TSMC CLN28HPC+ Derivative IP of IGASERT06A Enterprise Multi-Standard SerDes The GUC's Quad-Lane EMS-XT PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include CEI-28G-VSR, CEI-25G...

605 0.0

TSMC CLN5FF GLink 2.3LL Die-to-Die PHY IGAD2DY04A is a high-speed die-to-die interface PHY which transmits data through TSMC advanced packaging solutions: Integrated Fan-Out (InFO) with RDL...

606 0.0

TSMC CLN5FF GLink GPIO IGID2DY01A GLink GPIO is one of the GLink series IPs. It provides low speed (up to 500 MHz) connection between two dies without requiring any initiali...

607 0.0

TSMC CLN5FF GLink 2.0 Die-to-Die PHY IGPD2DY01A is a high-speed Die-to-Die interface PHY that transmits data through TSMC advanced packaging solutions: Integrated Fan-Out (InFO) with RDL ...

608 0.0

TSMC CLN7FF Lane-based 1.5 – 22.5 Gbps Enterprise Multi-Standard SerDes The GUC's EMS-PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include PCIe Gen1-Gen4, SAS-4 G1-G5 and a...

609 0.0

TSMC CLN5FF GLink-3D Die-to-Die Master PHY IGAD2DY02A is a GLink-3D high speed die-to-die interface Master PHY. It is used to transmit data between dies and assembled using TSMC System on Integ...

610 0.0

TSMC CLN7FF GLink-3D Die-to-Die Slave PHY IGAD2DX03A is a GLink-3D high speed die-to-die interface Slave PHY. It is used to transmit data between dies and assembled using TSMC System on Integr...

611 10.0

USB 2.0 nanoPHY in UMC (65nm) The Synopsys USB 2.0 nanoPHY provides designers with a complete Physical Layer (PHY) IP solution, designed for low-power mobile and consumer applicati...

612 0.0

USB2 - DUSB2-ULPI - USB 2.0 Device Controller with ULPI interface The DUSB2-ULPI is a hardware implementation of a full/high-speed peripheral controller that interfaces to an ULPI bus transceiver. The DUSB2-ULPI cont...

613 1.0

PSMBUS - DPSMBUS - SMBUS & PMBUS Master/Slave controller The DPSMBUS is a fully-featured module based on the I2C protocol, which supports SMBus and PMBus functionalities. It can operate as a DPSMBUSM – Ma...

614 5.0

MIPI-I3C Combo Host and Target interface controller IP for Sensor and Peripheral connection The MIPI I3C (Improved Inter Integrated circuit) is a two wire bidirectional Serial Bus for sensor communication. The MIPI I3C interface has been ...

615 1.0

MIPI CSI2 Receiver Interface The MIPI CSI-2 (Camera Serial Interface) defines an interface between a peripheral device (camera) and host processor (application engine) for mobile...

616 5.0

MIPI-I3C Combo IP Host/Target HDR-DDR compliance with Spec v1.1.1 MIPI I3C(Improved Inter Integrated Circuit) is a two-wire bidirectional serial Bus for sensors communication. The MIPI I3C interface has been develope...

617 10.0

USB 2.0 picoPHY in TSMC (40nm, 28nm) The Synopsys USB 2.0 picoPHY provides designers with a complete physical (PHY) layer IP solution, designed for low power mobile and consumer applicati...

618 0.0

MIPI M-PHY (HS-G3) in GlobalFoundries 28LP The MXL-MPHY-GF-28SLP is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI Alliance Standard for M-PHY. The IP can be u...

619 0.0

MIPI D-PHY Universal IP in TSMC 28HPM The MXL-DPHY-UNIV-T-28HPM is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for D-...

620 0.0

MIPI D-PHY Universal IP in SMIC 130nm The MXL-DPHY-UNIVERSAL-S-130 is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for...

621 0.0

MIPI D-PHY DSI RX (Receiver) in TSMC 110G The MXL-DPHY-DSI-RX-T-110G is a high-frequency, low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for ...

622 0.0

MIPI D-PHY DSI TX (Transmitter) in TSMC 65LP The MXL-DPHY-DSI-TX-T-65LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for D...

623 0.0

MIPI D-PHY CSI-2 RX (Receiver) in TSMC 40LP The MXL-DPHY-CSI-2-RX-T-40LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for...

624 0.0

MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 40LP The MXL-DPHY-CSI-2-TX-T-40LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for...

625 10.0

USB 2.0 picoPHY in UMC (40nm, 28nm) The Synopsys USB 2.0 picoPHY provides designers with a complete physical (PHY) layer IP solution, designed for low power mobile and consumer applicati...

626 0.0

MIPI M-PHY in SMIC 130nm The MXL-MPHY-S-130 is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI Alliance Standard for M-PHY. The IP can be used...

627 5.0

USB Power Delivery 3.1 Physical Layer CT20602 is a complete USB Power Delivery 3.1 Physical Layer. It also implements that part of the USB Power Delivery 3.1 Protocol Layer which are def...

628 5.0

SOF-Calibrated 48MHz USB Clock CT20101 extracts a precise 48MHz clock frequency underlying a USB 1.1 data stream. The device implements a loop that controls the output frequency o...

629 5.0

Low/Full Speed USB Billboard Controller The CT25100 is a Full-Speed USB controller, which enumerates as Billboard Device. It integrates all necessary infrastructures, including the CT201...

630 33.0

Ultra Low-Latency IP PCI-express Framework LeWiz makes available its low-latency PCI-express framework for IP licensing - targeting low-latency applications such as those in the financial secto...

631 11.0

Die-to-Die (D2D) Interconnect Lightweight die-to-die interconnect solution optimized for highest performance with the lowest power and area overhead...

632 11.0

MIPI D-PHY ...

633 0.0

MIPI C-PHY/D-PHY Combo CSI-2 TX 3.5Gsps/trio in TSMC 28nm The MXL-CDPHY-3p5G-CSI-2-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifi...

634 0.0

eDisplay Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 22ULP eDP/DP Tx PHY is designed for chips that perform eDP/DP data communication while operating at low power consumption. The main link is a multi-gigabit ...

635 0.0

MIPI D-PHY Universal IP in TSMC 40LP for Automotive The MXL-DPHY-UNIVERSAL-T-40LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard fo...

636 0.0

224G Ethernet PHY IP for TSMC N3P The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

637 4.0

PCIe 4.0 PHY (5nm) The PCIe PHY IP consists of hardmacro PMA and softmacro PCS compliant to PCIe Base 4.0 specification. This IP offers a cost-effective and low-power so...

638 5.0

MIPI C-PHY v2.0 /D-PHY v2.5 Combo IP MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices. To further improve thr...

639 50.0

40G UCIe PHY for organic substrate standard packages Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...

640 50.0

40G UCIe PHY for high-density advanced packages Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...

641 0.0

MIPI C/D PHY TX This MIPI C-PHY & D-PHY combo IP is designed to compliant with the MIPI C-PHY v1.0 & D-PHY v1.2 specifications. It is designed for low power and high-...

642 0.0

MIPI C-PHY/D-PHY Combo CSI-2 TX 4.5Gsps/trio in TSMC 28nm The MXL-CDPHY-4p5G-CSI-2-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifi...

643 0.0

MIPI D-PHY DSI RX (Receiver) in TSMC 65LP The MXL-DPHY-DSI-RX-T-65LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for D...

644 45.0

32G Multi Rate Very Short Reach SerDes PHY - GlobalFoundries 12LP and 12LPP Extoll’s SerDes architecture is based on digital design elements and methodologies. Plain analog blocks are only used where absolutely necessary. Vari...

645 45.0

32G Multi Rate Long Reach SerDes PHY - GlobalFoundries 12LP and 12LPP Extoll’s SerDes architecture is based on digital design elements and methodologies. Plain analog blocks are only used where absolutely necessary. Vari...

646 0.0

MIPI DPHY RX This MIPI D-PHY IP is designed to compliant with the MIPI D-PHY v1.2 specifications. It is designed for low power and high-performance application. Th...

647 0.0

Single Carrier Modem The designed Single Carrier is working at adjustable sampling rate as low as 83.457 KHz, as high as 56 MHz and it supports adjustable band width as lo...

648 4.0

PCIe 4.0 PHY (8nm) The PCIe PHY IP consists of hardmacro PMA and softmacro PCS compliant to PCIe Base 4.0 specification. This IP offers a cost-effective and low-power so...

649 0.0

MIPI D-PHY DSI TX (Transmitter) in TSMC 28nm The MXL-D-PHY-DSI-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...

650 2.0

MIPI C-PHY TRx 2.5Gsps) / D-PHY TRx 4.5Gbps Combo PHY (8nm) The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 4.5Gbps for D-PHY and 2.5Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), an...