701 10.0

USB 3.0 femtoPHY in GF (28nm, 12nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

702 0.0

MIPI M-PHY in TSMC 65LP The MXL-M-PHY-DIGRF is a high-frequency low-power, low-cost, Physical Layer IP that supports the MIPI® Alliance Standard for M-PHY and DigRF. The IP ...

703 0.0

USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 28HPC+ All USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps are supported by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....

704 0.0

USB 3.0 PHY IP, Silicon Proven in TSMC 12FFC For auxiliary devices, a Universal Serial Bus (USB) transceiver is offered. The PHY complies with the requirements of UTMI, USB 2.0 PIPE, and USB 3.0 ...

705 0.0

USB 3.0 PHY IP, Silicon Proven in TSMC 16FFC A Universal Serial Bus (USB) transceiver is available for auxiliary devices. The PHY meets with the specifications of USB 3.0 (USB SuperSpeed), USB 2....

706 0.0

USB 3.0 PHY IP, Silicon Proven in TSMC 22ULP The USB 3.0 PHY IP Core is a transceiver provided for supplementary devices, compliant with UTMI (USB SuperSpeed), USB 3.0, and USB 2.0 PIPE requireme...

707 0.0

USB 3.0 PHY IP, Silicon Proven in TSMC 40LP A Universal Serial Bus (USB) transceiver is available for auxiliary devices. The PHY complies with the UTMI, USB 3.0, and USB 2.0 PIPE requirements (U...

708 0.0

USB 3.0 PHY IP, Silicon Proven in TSMC 55LP For auxiliary devices, a Universal Serial Bus (USB) transceiver is offered. The UTMI, USB 3.0, and USB 2.0 PIPE requirements are met by the PHY (USB S...

709 0.0

USB 2.0 PHY IP, Silicon Proven in TSMC 7FF The USB2.0 PHY IP is a full physical layer (PHY) IP solution created for exceptional performance and low power consumption. The High-Speed USB 2.0 tra...

710 0.0

USB 2.0 PHY IP, Silicon Proven in TSMC 12FFC The whole physical layer (PHY) IP solution for USB 2.0 was designed for outstanding performance and low power consumption. The High-Speed USB 2.0 Tran...

711 0.0

USB 2.0 PHY IP, Silicon Proven in TSMC 55LP In order to deliver great performance and use little power, the whole physical layer (PHY) IP solution for USB 2.0 was developed. The High-Speed USB 2...

712 0.0

USB 2.0 PHY IP, Silicon Proven in TSMC 65LP A complete physical layer (PHY) IP solution designed for outstanding performance and minimal power consumption is the USB2.0 PHY IP. The USB2.0 IP imp...

713 0.0

MIPI D-PHY CSI-2 RX+ (Receiver) IP in TSMC 40LP The MXL-DPHY-CSI-2-RX+-T-40LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI® Alliance Standard fo...

714 0.0

USB 2.0 PHY IP, Silicon Proven in TSMC 90G The USB2.0 PHY IP is a full physical layer (PHY) IP solution created for exceptional performance and low power consumption. The High-Speed USB 2.0 tra...

715 0.0

eDisplay Port v1.4 Rx PHY IP in 40LL, Silicon Proven in SMIC 40LL The eDisplay Port v1.4 Rx PHY IP Core caters to chips requiring high-bandwidth communication with minimal power consumption. It serves as a multi-giga...

716 0.0

USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 55LL The USB3.1Type-C PHY is a high-speed, SERDES IP with high performance that was created for semiconductors that allow high-bandwidth, low-power data tr...

717 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+ The combination PHY is SATA (Serial ATA) compliant with SATA 3.0 Specification, PCIe (Peripheral Component Interconnect Express) compliant with PIPE i...

718 0.0

MIPI D-PHY Tx IP, Silicon Proven in TSMC 7FF Low-power, and low-cost C-PHY/D-PHY Combo in various process nodes. Users are able to configure this Combo PHY into either D-PHY or C-PHY mode to supp...

719 0.0

MIPI D-PHY Rx IP, Silicon Proven in TSMC 7FF Various manufacturing nodes using C-PHY/D-PHY Combo at minimal cost and power. Users have the option of setting this Combo PHY in either D-PHY or C-P...

720 0.0

MIPI D-PHY Tx IP, Silicon Proven in TSMC 12FFC C-PHY/D-PHY Combo in various process nodes with low power and cost. To support various applications, users can set up this Combo PHY in either D-PHY o...

721 0.0

MIPI D-PHY Rx IP, Silicon Proven in TSMC 12FFC Several production nodes employ C-PHY/D-PHY Combo with the least amount of power and expense. To accommodate a range of applications, users can config...

722 0.0

MIPI D-PHY Tx IP, Silicon Proven in TSMC 16FFC The MIPI D-PHY Tx IP Core is fully compliant with the D-PHY specification, version 1.2, ensuring adherence to industry standards. It offers compatibil...

723 0.0

MIPI D-PHY Rx IP, Silicon Proven in TSMC 16FFC The MIPI D-PHY RX IP Core fully adheres to the D-PHY specification, version 1.2. It supports both the Display Serial Interface (DSI) and the MIPI Came...

724 0.0

MIPI D-PHY Universal IP in UMC 40LP The MXL-DPHY-UNIV is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI Alliance Standard for D-PHY. The...

725 0.0

MIPI D-PHY Tx IP, Silicon Proven in TSMC 40LP The MIPI D-PHY Analog TX IP Core fully complies with version 1.2 of the D-PHY specification. It is compatible with the MIPI Camera Serial Interface (C...

726 0.0

MIPI D-PHY Rx IP, Silicon Proven in TSMC 40LP The D-PHY specification, version 1.2, is fully complied with by the MIPI D-PHY Analog RX IP Core. It is possible to use the Display Serial Interface (...

727 0.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 7 FF Low-power, and low-cost C-PHY/D-PHY Combo in various process nodes. Users are able to configure this Combo PHY into either D-PHY or C-PHY mode to supp...

728 0.0

MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 7 FF Low-power, and low-cost C-PHY/D-PHY Combo in various process nodes. Users are able to configure this Combo PHY into either D-PHY or C-PHY mode to supp...

729 0.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 12 FFC C-PHY/D-PHY Combo in various process nodes with low power and cost. To support various applications, users can set up this Combo PHY in either D-PHY o...

730 0.0

MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 12 FFC Several production nodes employ C-PHY/D-PHY Combo with the least amount of power and expense. To accommodate a range of applications, users can config...

731 0.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 16 FFC Low power and cost C-PHY/D-PHY Combo in multiple process nodes. Users can configure this Combo PHY in either D-PHY or C-PHY mode to support a variety ...

732 0.0

MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 16 FFC In order to use the least amount of power and money, several production nodes use C-PHY/D-PHY Combo. The Combo PHY can be set up by users in either D-...

733 200.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 22 ULP C-PHY/D-PHY Combo in numerous process nodes at low cost and power. To accommodate a range of applications, users can set this Combo PHY in either D-PH...

734 0.0

MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 22 ULP In order to use the least amount of power and money, several production nodes use C-PHY/D-PHY Combo. The Combo PHY can be set up by users in either D-...

735 0.0

MIPI C-PHY/D-PHY Combo Universal IP in UMC 40LP The MXL-CDPHY-UNIV-U-40LP is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY can be configured as a MIPI Master or M...

736 0.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 28 HPC+ C-PHY/D-PHY Combo at low cost and power in several manufacturing nodes. Users have the option of setting this Combo PHY in either D-PHY or C-PHY mode ...

737 0.0

MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 28 HPC+ Several production nodes employ C-PHY/D-PHY Combo to consume the least amount of energy and funds. Users can configure the Combo PHY in D-PHY or C-PHY...

738 0.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 40 LP C-PHY/D-PHY Combo in various production nodes at low cost and power. To accommodate a range of applications, users can set this Combo PHY in either D-...

739 0.0

MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 40 LP Many production nodes use the C-PHY/D-PHY Combo because it uses the fewest resources and energy. Users can configure the Combo PHY in D-PHY or C-PHY m...

740 0.0

MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 40 LP The MIPI M-PHY Gear 4 IP is compatible with the most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specificatio...

741 0.0

MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 55 ULP The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specification, and Universal ...

742 0.0

MIPI D-PHY Tx IP, Silicon Proven in GF 55LP The D-PHY specification, version 1.2, is completely complied with by the MIPI D-PHY Analog TX IP Core. The Display Serial Interface and the MIPI Camer...

743 0.0

MIPI D-PHY Rx IP, Silicon Proven in GF 55LP Version 1.2 of the D-PHY specification is fully complied with by the MIPI D-PHY Analog RX IP Core. Both the MIPI Camera Serial Interface (CSI-2) and D...

744 0.0

USB 2.0 PHY IP, Silicon Proven in TSMC 16FFC The entire physical layer (PHY) IP solution for USB 2.0 was created to provide exceptional performance and consume little power. The USB2.0 IP impleme...

745 0.0

IEC 7816 Smart Card IP The IEC7816 Slave Controller IP Core is full-featured, easy-to-use, synthesizable designs that are easily integrated into any SoC or FPGA development....

746 0.0

MIPI D-PHY DSI TX (Transmitter) in Samsung 28FDSOI The MXL-DPHY-DSI-TX-SS-28FDSOI is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI® Alliance Standard for ...

747 0.0

MIPI I3C Master v1.1 Controller IP offers impressive data transmission capacity for sensor integration. I3C interface is a fast, low cost, low power, two wire digital interface for sensors in mobile wireless products, compliant with MIPI Alliance. Our I3...

748 0.0

MIPI I3C Slave v1.1 Controller IP enables efficient data flow for sensor integration. As Sensor data rate increases, there is a necessity to have control information flowing to and from sensors at an efficient data rate. Also, to bridge...

749 0.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes for TSMC 12FFCP Synopsys’ integrated DesignWare C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and...

750 26.0

HDMI 2.1 IP Core The Bitec HDMI 2.1b IP Core enables HDMI interconnectivity in FPGA or ASIC devices. Supporting uncompressed video formats to 8K60 4:2:0 and beyond for...