Design & Reuse
1928 IP
701
0.0
MIPI D-PHY Universal IP in TSMC 28LP
The MXL-DPHY-UNIV-T-28LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI Alliance Standard for D-PH...
702
0.0
PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 7nm
For the high-bandwidth applications, PCIe 3.0 PHY IP offers high-performance, multi-lane capabilities, and low-power design. The PCIe 3.0 IP complies ...
703
0.0
PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC
To support high-bandwidth applications, PCIe 3.0 PHY IP provides a low-power, multi-lane, high-performance design. The PCIe 3.0 IP complies with the P...
704
0.0
PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
High-bandwidth applications can avail advantage of PCIe 3.0 PHY IP's high performance, multi-lane scalability, and low-power layout. A full variety of...
705
0.0
PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 22ULP
The PCIe 3.0 PHY IP is designed to support increased applications with its low-power, multi-lane, high-performance design. It fully supports a wide ra...
706
0.0
PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 7nm
A comprehensive selection of PCIe 2.0 Base applications is offered by PCIe 2.0 transceiver IP. It complies with the requirements of PIPE 3.0. In order...
707
0.0
PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC
A wide variety of PCIe 2.0 Base applications are available with PCIe 2.0 transceiver IP. It adheres to the PIPE 3.0 standard. In order to enable PCIe ...
708
0.0
PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
The whole spectrum of PCIe 2.0 Base applications is offered by PCIe 2.0 transceiver IP. It adheres to the PIPE 3.0 standard. The PCIe 2.0 data rate at...
709
0.0
PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 40ULP
The full gamut of PCIe 2.0 Base operations is covered by PCIe 2.0 transceiver IP. It conforms to the PIPE 3.0 standard. This IP combines high-speed mi...
710
0.0
PCIe 3.0 Serdes PHY IP, Silicon Proven in SMIC 40LP
Compliance with the PCIe 3.0 Base Specification is standardized by the PCIe 3.0 PHY IP with PIPE 4.3 interface standard. Because the low power mode op...
711
0.0
PCIe 2.0 Serdes PHY IP, Silicon Proven in SMIC 14SF+
The PCIe 2.0 transceiver IP supports all PCIe 2.0 Base applications. It complies with the PIPE 3.0 standard. This IP incorporates high-speed mixed sig...
712
0.0
MIPI M-PHY in SMIC 90LL
The MXL_MPHY_S_090LL is a high-frequency low-power, low-cost, Physical Layer IP that supports the MIPI Alliance Standard for M-PHY. The IP can be used...
713
0.0
HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in ST 28FDSOI
The logic required to create and validate designs for diverse applications is provided by HDMI Transmitter (TX) IP solutions, which are compliant with...
714
0.0
V-by-One/LVDS Tx Combo PHY, Silicon Proven in 28HPC+
V-by-One/ LVDS Tx Combo PHY IP Core aims at achieving high-speed data transmission for video signals through internal equipment connections. The V-by-...
715
0.0
V-by-One Tx IP, Silicon Proven in 40G
The V-by-One HS technology aims to transmit video signals at a high data rate using an internal connection between devices. The requirements to create...
716
0.0
V-by-One Rx IP, Silicon Proven in 40G
Using internal equipment connections, the V-by-One HS technology seeks to send video signals at a high data rate. The V-by-One HS Standard outlines th...
717
0.0
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 55SP
The DisplayPort transmitter PHY version 1.4 can transmit data at rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2). Common-mode biassing of the CDR bandw...
718
0.0
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 55SP
The maximum capacity of the Display Port 1.4 Rx IP Channel is supported. Up to 5.4bps per channel, programmable analogue settings such as CDR Bandwidt...
719
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 7FF
The USB 3.2 Gen2X1 transceiver IP offers all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. Both the UTMI+ and PIPE4.0 specifications a...
720
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 12FFC
All USB 3.2 Gen2X1 host and peripheral applications are supported up to 10Gbps by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....
721
0.0
USB 3.0 PHY IP, Silicon Proven in TSMC 7FF
A Universal Serial Bus (USB) transceiver is available for auxiliary devices. The PHY meets with the specifications of USB 3.0 (USB SuperSpeed), USB 2....
722
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 16FFC
The USB 3.2 Gen2X1 transceiver IP supports all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. It conforms with the standards of UTMI+ a...
723
10.0
USB 3.0 femtoPHY in GF (28nm, 12nm)
The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...
724
0.0
MIPI M-PHY in TSMC 65LP
The MXL-M-PHY-DIGRF is a high-frequency low-power, low-cost, Physical Layer IP that supports the MIPI® Alliance Standard for M-PHY and DigRF. The IP ...
725
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 28HPC+
All USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps are supported by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....
726
30.0
USB 3.0 PHY IP, Silicon Proven in TSMC 12FFC
For auxiliary devices, a Universal Serial Bus (USB) transceiver is offered. The PHY complies with the requirements of UTMI, USB 2.0 PIPE, and USB 3.0 ...
727
0.0
USB 3.0 PHY IP, Silicon Proven in TSMC 16FFC
A Universal Serial Bus (USB) transceiver is available for auxiliary devices. The PHY meets with the specifications of USB 3.0 (USB SuperSpeed), USB 2....
728
10.0
USB 3.0 PHY IP, Silicon Proven in TSMC 22ULP
The USB 3.0 PHY IP Core is a transceiver provided for supplementary devices, compliant with UTMI (USB SuperSpeed), USB 3.0, and USB 2.0 PIPE requireme...
729
0.0
USB 3.0 PHY IP, Silicon Proven in TSMC 40LP
A Universal Serial Bus (USB) transceiver is available for auxiliary devices. The PHY complies with the UTMI, USB 3.0, and USB 2.0 PIPE requirements (U...
730
0.0
USB 3.0 PHY IP, Silicon Proven in TSMC 55LP
For auxiliary devices, a Universal Serial Bus (USB) transceiver is offered. The UTMI, USB 3.0, and USB 2.0 PIPE requirements are met by the PHY (USB S...
731
0.0
USB 2.0 PHY IP, Silicon Proven in TSMC 7FF
The USB2.0 PHY IP is a full physical layer (PHY) IP solution created for exceptional performance and low power consumption. The High-Speed USB 2.0 tra...
732
0.0
USB 2.0 PHY IP, Silicon Proven in TSMC 12FFC
The whole physical layer (PHY) IP solution for USB 2.0 was designed for outstanding performance and low power consumption. The High-Speed USB 2.0 Tran...
733
0.0
USB 2.0 PHY IP, Silicon Proven in TSMC 55LP
In order to deliver great performance and use little power, the whole physical layer (PHY) IP solution for USB 2.0 was developed. The High-Speed USB 2...
734
0.0
USB 2.0 PHY IP, Silicon Proven in TSMC 65LP
A complete physical layer (PHY) IP solution designed for outstanding performance and minimal power consumption is the USB2.0 PHY IP. The USB2.0 IP imp...
735
0.0
MIPI D-PHY CSI-2 RX+ (Receiver) IP in TSMC 40LP
The MXL-DPHY-CSI-2-RX+-T-40LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI® Alliance Standard fo...
736
0.0
USB 2.0 PHY IP, Silicon Proven in TSMC 90G
The USB2.0 PHY IP is a full physical layer (PHY) IP solution created for exceptional performance and low power consumption. The High-Speed USB 2.0 tra...
737
0.0
eDisplay Port v1.4 Rx PHY IP in 40LL, Silicon Proven in SMIC 40LL
The eDisplay Port v1.4 Rx PHY IP Core caters to chips requiring high-bandwidth communication with minimal power consumption. It serves as a multi-giga...
738
0.0
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 55LL
The USB3.1Type-C PHY is a high-speed, SERDES IP with high performance that was created for semiconductors that allow high-bandwidth, low-power data tr...
739
0.0
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+
The combination PHY is SATA (Serial ATA) compliant with SATA 3.0 Specification, PCIe (Peripheral Component Interconnect Express) compliant with PIPE i...
740
0.0
MIPI D-PHY Tx IP, Silicon Proven in TSMC 7FF
Low-power, and low-cost C-PHY/D-PHY Combo in various process nodes. Users are able to configure this Combo PHY into either D-PHY or C-PHY mode to supp...
741
0.0
MIPI D-PHY Rx IP, Silicon Proven in TSMC 7FF
Various manufacturing nodes using C-PHY/D-PHY Combo at minimal cost and power. Users have the option of setting this Combo PHY in either D-PHY or C-P...
742
0.0
MIPI D-PHY Tx IP, Silicon Proven in TSMC 12FFC
C-PHY/D-PHY Combo in various process nodes with low power and cost. To support various applications, users can set up this Combo PHY in either D-PHY o...
743
40.0
MIPI D-PHY Rx IP, Silicon Proven in TSMC 12FFC
Several production nodes employ C-PHY/D-PHY Combo with the least amount of power and expense. To accommodate a range of applications, users can config...
744
0.0
MIPI D-PHY Tx IP, Silicon Proven in TSMC 16FFC
The MIPI D-PHY Tx IP Core is fully compliant with the D-PHY specification, version 1.2, ensuring adherence to industry standards. It offers compatibil...
745
0.0
MIPI D-PHY Rx IP, Silicon Proven in TSMC 16FFC
The MIPI D-PHY RX IP Core fully adheres to the D-PHY specification, version 1.2. It supports both the Display Serial Interface (DSI) and the MIPI Came...
746
0.0
MIPI D-PHY Universal IP in UMC 40LP
The MXL-DPHY-UNIV is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI Alliance Standard for D-PHY. The...
747
0.0
MIPI D-PHY Tx IP, Silicon Proven in TSMC 40LP
The MIPI D-PHY Analog TX IP Core fully complies with version 1.2 of the D-PHY specification. It is compatible with the MIPI Camera Serial Interface (C...
748
0.0
MIPI D-PHY Rx IP, Silicon Proven in TSMC 40LP
The D-PHY specification, version 1.2, is fully complied with by the MIPI D-PHY Analog RX IP Core. It is possible to use the Display Serial Interface (...
749
10.0
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 7 FF
Low-power, and low-cost C-PHY/D-PHY Combo in various process nodes. Users are able to configure this Combo PHY into either D-PHY or C-PHY mode to supp...
750
0.0
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 7 FF
Low-power, and low-cost C-PHY/D-PHY Combo in various process nodes. Users are able to configure this Combo PHY into either D-PHY or C-PHY mode to supp...