751 0.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 12 FFC C-PHY/D-PHY Combo in various process nodes with low power and cost. To support various applications, users can set up this Combo PHY in either D-PHY o...

752 0.0

MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 12 FFC Several production nodes employ C-PHY/D-PHY Combo with the least amount of power and expense. To accommodate a range of applications, users can config...

753 0.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 16 FFC Low power and cost C-PHY/D-PHY Combo in multiple process nodes. Users can configure this Combo PHY in either D-PHY or C-PHY mode to support a variety ...

754 0.0

MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 16 FFC In order to use the least amount of power and money, several production nodes use C-PHY/D-PHY Combo. The Combo PHY can be set up by users in either D-...

755 0.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 22 ULP C-PHY/D-PHY Combo in numerous process nodes at low cost and power. To accommodate a range of applications, users can set this Combo PHY in either D-PH...

756 0.0

MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 22 ULP In order to use the least amount of power and money, several production nodes use C-PHY/D-PHY Combo. The Combo PHY can be set up by users in either D-...

757 0.0

MIPI C-PHY/D-PHY Combo Universal IP in UMC 40LP The MXL-CDPHY-UNIV-U-40LP is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY can be configured as a MIPI Master or M...

758 0.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 28 HPC+ C-PHY/D-PHY Combo at low cost and power in several manufacturing nodes. Users have the option of setting this Combo PHY in either D-PHY or C-PHY mode ...

759 0.0

MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 28 HPC+ Several production nodes employ C-PHY/D-PHY Combo to consume the least amount of energy and funds. Users can configure the Combo PHY in D-PHY or C-PHY...

760 0.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 40 LP C-PHY/D-PHY Combo in various production nodes at low cost and power. To accommodate a range of applications, users can set this Combo PHY in either D-...

761 0.0

MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 40 LP Many production nodes use the C-PHY/D-PHY Combo because it uses the fewest resources and energy. Users can configure the Combo PHY in D-PHY or C-PHY m...

762 0.0

MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 40 LP The MIPI M-PHY Gear 4 IP is compatible with the most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specificatio...

763 0.0

MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 55 ULP The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specification, and Universal ...

764 0.0

MIPI D-PHY Tx IP, Silicon Proven in GF 55LP The D-PHY specification, version 1.2, is completely complied with by the MIPI D-PHY Analog TX IP Core. The Display Serial Interface and the MIPI Camer...

765 0.0

MIPI D-PHY Rx IP, Silicon Proven in GF 55LP Version 1.2 of the D-PHY specification is fully complied with by the MIPI D-PHY Analog RX IP Core. Both the MIPI Camera Serial Interface (CSI-2) and D...

766 0.0

USB 2.0 PHY IP, Silicon Proven in TSMC 16FFC The entire physical layer (PHY) IP solution for USB 2.0 was created to provide exceptional performance and consume little power. The USB2.0 IP impleme...

767 0.0

IEC 7816 Smart Card IP The IEC7816 Slave Controller IP Core is full-featured, easy-to-use, synthesizable designs that are easily integrated into any SoC or FPGA development....

768 0.0

MIPI D-PHY DSI TX (Transmitter) in Samsung 28FDSOI The MXL-DPHY-DSI-TX-SS-28FDSOI is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI® Alliance Standard for ...

769 0.0

MIPI I3C Master v1.1 Controller IP offers impressive data transmission capacity for sensor integration. I3C interface is a fast, low cost, low power, two wire digital interface for sensors in mobile wireless products, compliant with MIPI Alliance. Our I3...

770 0.0

MIPI I3C Slave v1.1 Controller IP enables efficient data flow for sensor integration. As Sensor data rate increases, there is a necessity to have control information flowing to and from sensors at an efficient data rate. Also, to bridge...

771 0.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes for TSMC 12FFCP Synopsys’ integrated DesignWare C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and...

772 26.0

HDMI 2.1 IP Core The Bitec HDMI 2.1b IP Core enables HDMI interconnectivity in FPGA or ASIC devices. Supporting uncompressed video formats to 8K60 4:2:0 and beyond for...

773 0.0

MIPI D-PHY CSI-2 RX (Receiver) in TSMC 16FFC he MXL-DPHY-CSI-2-RX-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification f...

774 4.0556

I3C and I2C Combo It supports standard I3C, high-speed I3C, and Ultra-higher-speed I3C modes. Push-pull operation in I3C modes. Supports I2C standard mode, fast mode, f...

775 5.0

SPI Slave Controller (SPI2APB, SPI2AXI, SPI2AHB Bus) The Digital Blocks DB-SPI-S-AMBA-BRIDGE is a Serial Port Interface (SPI) Controller Verilog IP Core supporting SPI Slave Interface to APB Master Bus. ...

776 0.0

TSMC CLN3FFE GLink 2.3LL Die-to-Die PHY IGPD2DZO1A is a high-speed Die-to-Die interface PHY that transmits data through TSMC advanced packaging solutions, Integrated Fan-Out (InFO) with the ...

777 0.0

MIPI D-PHY CSI-2 RX (Receiver) in Samsung 28FDSOI The MXL-DPHY-CSI-2-RX-SS-28FDSOI is a high- frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI® Alliance Standard f...

778 0.0

UCIe PHY on Samsung SF5A Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netwo...

779 10.0

MIPI I3C Basic Secondary Controller The I3C-SC core implements a versatile MIPI® Improved Inter Integrated Circuit (I3C) Secondary Controller core compliant with the latest MIPI I3C Basi...

780 50.0

HDMI 2.1 Tx PHY in TSMC (16nm, 12nm, N7, N6, N4, N3E) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

781 50.0

HDMI 2.1/DisplayPort 2.1 TX PHY in TSMC (N3E, N3P) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

782 0.0

VESA VDC-M V1.2 Encoder Embrace the future of digital media with Arasan's VESA VDC-M v1.2 Encoder. Our groundbreaking product revolutionizes video compression technology, off...

783 11.0

MIPI M-PHY HS-G4 IP (M-PHY v4.1) in TSMC 40G The MXL-MIPI-M-PHY is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI Alliance Standard for M-PHY. The IP can be used ...

784 0.0

MIPI C-PHY/D-PHY Combo CSI-2 TX (Transmitter) IP in TSMC 65LP The MXL-CDPHY-CSI-2-TX-T-65LP is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY is configured as a MIPI Master supp...

785 0.0

PCIe 5.0 PHY for SF5 The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

786 0.0

PCIe 6.0 PHY for TSMC N6 The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...

787 1.0

32G Multi-SerDes PHY + Controller The INNOSILICON™ 32G Multi-SerDes PHY is a highly configurable IP solution capable of supporting data rates of up to 32 Gbps per lane. It is designed ...

788 0.0

PCIe 6.0 PHY IP for TSMC N3E The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...

789 0.0

CSI2 TX; Camera Serial Interface, MIPI Compliant CSI2 – TX is part of HCL’s MIPI® compliant offerings. The CSI2 Transmitter IP supports Pixel Interface on the camera sensor side and the DPHY is suppo...

790 0.0

CSI2 RX; Camera Serial Interface, MIPI Compliant The CSI2 Receiver IP Interfaces between Camera module which has the transmitter and the application processor. The CSI2 Receiver IP is fully compliant...

791 4.0

MIL1553B IP Core MIL-STD-1553B defines specifications for terminal device operation and coupling, word structure and format, messaging protocol and electrical characte...

792 102.0

MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 4.5Gsps/4.5Gbps The MXL-CDPHY-4p5G-CSI-2-TX+-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...

793 5.0

PCIe 6.0 PHY (5nm) The PCIe PHY IP consists of hardmacro PMA and softmacro PMD compliant to PCIe Base 6.0 specification. This IP offers a cost-effective and low-power so...

794 0.0

MIPI D-PHY DSI RX (Receiver) for Automotive in GlobalFoundries 55HV The MXL-DPHY-DSI-RX-GF-55HV is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification for...

795 0.0

VESA DSC 1.2b Encoder for Xilinx FPGAs ...

796 0.0

VESA DSC 1.2b Decoder IP Core for Xilinx FPGAs ...

797 200.0

PCIe 7.0 Controller The Rambus PCI Express® (PCIe®) 7.0 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 6...

798 100.0

PCIe 7.0 PHY IP supporting the latest features of the evolving PCIe 7.0 specification to enable 128 GT/s and up to x16 lane configurations The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...

799 0.0

AXI2APB Bridge Truechip's AXI2APB IP provides chip designers and architects, an efficient way to connect AXI & APB based IPs with reduced latency, power, and area....

800 0.0

16G Serdes in SMIC 28HKCP Brite Semiconductor‘s Serdes provides 2.5-32Gbps multi-rate SERDES IP which is designed for smooth integration of Multiple SERDES lanes demonstrate go...