Design & Reuse
1928 IP
901
0.0
MIPI D-PHY CSI-2 RX+ (Receiver) IP in UMC 40ULP
The MXL-DPHY-CSI-2-RX+-U-40ULP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification ...
902
0.0
VESA DSC V1.2 Decoder
Arasan’s VESA DSC v1.2 decoder IP core compresses high-definition streams in real time at resolutions ranging from 480 to 8K. The core supports 8, 10,...
903
0.0
MIPI DSI-2 Receiver Controller v2.0
Arasan’s Display Host and DSI device controllers are built on existing MIPI Alliance standards by adopting pixel formats, controlling pins and comma...
904
0.0
MIPI SPMI 2.0 Host IP
Arasan’s SPMI Host IP (Configurable Controller Cores) implements MIPI SPMI2.0 protocols. It is designed to be configured as a SPMI Host, SPMI Device C...
905
0.0
Globalfoundries 22nm MIPI D-PHY Rx only V1.2@2.5GHz
Arasan Chip Systems standalone MIPI D-PHY(SM) Recieve (Rx) only for Globalfoundries 22nm FinFET process nodes. Arasan's standalone D-PHY Rx only for...
906
0.0
Globalfoundries 22nm MIPI D-PHY Tx only V1.2@2.5GHz
Arasan Chip Systems standalone MIPI D-PHY(SM) Transmit only for Globalfoundries 22nm FinFET process nodes. Arasan's standalone D-PHY Tx only for Glo...
907
0.0
Globalfoundries 22nm MIPI D-PHY Rx only V1.1@1.5GHz
Arasan 2nd Generation MIPI D-PHY v1.1 Rx IP supporting speeds of up to 1.5 Gbps on GF 22nm process technology for SoC designs. Arasan’s D-PHY IP is av...
908
0.0
Globalfoundries 22nm MIPI D-PHY Tx only V1.1@1.5GHz
Arasan 2nd Generation MIPI D-PHY v1.1 Tx IP supporting speeds of up to 1.5 Gbps on GF 22nm process technology for SoC designs. Arasan’s D-PHY IP is av...
909
0.0
Globalfoundries 22nm MIPI D-PHY Universal Tx-Rx V1.1@1.5GHz
Arasan 2nd Generation MIPI D-PHY v1.1 IP supporting speeds of up to 1.5 Gbps on GF 22nm process technology for SoC designs. Arasan’s D-PHY IP is avail...
910
100.0
USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm
The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use...
911
100.0
USB 2.0 PHY GlobalFoundaries 12nm, 22nm, 28nm, 40nm
The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use...
912
52.0
MIPI D-PHY CSI-2 RX (Receiver) in GlobalFoundries 22FDX
The MXL-DPHY-CSI-2-RX-GF-22FDX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification ...
913
20.0
VESA VDC-M V1.2 Decoder
Embrace the future of digital media with Arasan's VESA VDC-M v1.2 Decoder. Our groundbreaking product revolutionizes video compression technology, off...
914
45.0
FlexNoC 5 Network-on-Chip (NoC)
Arteris FlexNoC 5 network-on-chip (NoC) physically aware interconnect IP improves development time, performance, power consumption, and die size of sy...
915
0.0
Smart Network-on-Chip (NoC) IP
AI-Enhanced Automation for Smarter SoC Design FlexGen™ by Arteris redefines how SoC designers create Network-on-Chip IP by introducing cutting-edge...
916
3.0
USB 2.0 (LS, FS & HS) On-The-Go IP Core
A 'Dual-Role' USB On-The-Go IP Core that operates as both an USB peripheral or as an USB OTG host in a point-to-point communications with another USB ...
917
1.0
USB 2.0 Device IP Core
A USB 2.0 Device IP Core that provides high performance small footprint solution for quick and easy implementation of a USB Device interface. The USB...
918
1.0
I2C Master and Slave
I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices. It is most suitable for app...
919
6.0
USB 3.0 Device
A USB 3.0 Device IP Core that provides high performance SuperSpeed USB connectivity in a small footprint solution for quick and easy implementation of...
920
0.0
16G Serdes in SMIC 28HKD 0.9/1.8V
Brite Semiconductor‘s Serdes provides 2.5-32Gbps multi-rate SERDES IP which is designed for smooth integration of Multiple SERDES lanes demonstrate go...
921
0.0
16G Serdes in SMIC 28HKD 0.9/2.5V
Brite Semiconductor‘s Serdes provides 2.5-32Gbps multi-rate SERDES IP which is designed for smooth integration of Multiple SERDES lanes demonstrate go...
922
0.0
12.5G Serdes in SMIC 40NLL
Brite Semiconductor‘s Serdes provides 2.5-32Gbps multi-rate SERDES IP which is designed for smooth integration of Multiple SERDES lanes demonstrate go...
923
10.0
USB 3.0 femtoPHY in Samsung (14nm, 11nm, 10nm)
The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...
924
0.0
MIPI D-PHY CSI-2 TX+ (Transmitter) IP in TSMC 28HPC+
The MXL-DPHY-CSI-2-TX+-T028HPC+-RF-ULL is a high-frequency low-power, source-synchronous, physical layer supporting the MIPI Alliance Specification fo...
925
0.0
PCIE4 PHY in SMIC 28HKD 0.9/1.8V
Brite Semiconductor's 16Gbps PCIe PHY and controller solution provide high efficient interconnection that is optimized for PPA performance. The System...
926
0.0
PCIE4 PHY in SMIC 28HKD 0.9/2.5V
Brite Semiconductor's 16Gbps PCIe PHY and controller solution provide high efficient interconnection that is optimized for PPA performance. The System...
927
0.0
PCI Master/Target Interface Core
...
928
0.0
32-bit, 33 MHz Multifunction Target Interface
The PCI-T32MF implements a target-only PCI interface compliant with the PCI 2.3 specification. It supports a 32-bit address/data bus and operates up t...
929
0.0
32-bit/33,66Mhz PCI Host Bridge
...
930
0.0
AMBA AHB to APB Bus Bridge Core
The AHB2APB implements an AHB to APB bus bridge, allowing the connection of peripherals with an APB interface to an AHB bus. The highly-configurable...
931
0.0
General-Purpose I/O Controller Core
The GPIO core is used to create functions in a system that are not implemented with dedicated controllers, and require simple input and/or output soft...
932
0.0
Internal Synchronous SRAM Controller Core
The SRAM-CTRL implements a SRAM Controller providing a standard AHB/APB interface to translate AHB/APB bus reads and writes into reads and writes with...
933
0.0
Multi-Function PCI Master/Target Interface Core
The PCI-M32MF implements a master/target PCI interface compliant with the PCI 2.3 specification. It supports a 32-bit address/data bus and operates up...
934
5.0
MIPI I3C Basic Target
The I3C-T core implements a versatile MIPI® Improved Inter Integrated Circuit (I3C) Target controller core suitable for any I3C bus topology & complia...
935
0.0
MIPI D-PHY Universal IP in TSMC 22ULP
The MXL-DPHY-UNIV-T-22ULP is a high-frequency low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for D...
936
10.0
I2C and SPI Master/Slave Controller
The I2CSPI-CTRL is a compact and versatile serial interface controller supporting both SPI (Serial Peripheral Interface) and I2C (Inter-Integrated Cir...
937
0.0
MIPI D-PHY CSI-2 TX (Transmitter) in GlobalFoundries 22FDX
The MXL-DPHY-CSI-2-TX-GF-22FDX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Specification ...
938
10.0
Interlaken Controller
Interlaken is a scalable chip-to-chip protocol, which ensures the integrity of reliable data transfer and managing data flows to prevent data overload...
939
10.0
MIPI I3C Controller and Target fully featured IP solution
The MIPI I3C Controller IP is a highly optimized and technology-agnostic implementation of the MIPI I3C v.1.1.1 standard targeting both ASIC and F...
940
30.0
Universal Chiplet Interconnect Express (UCIe) Controller
Integrating multiple chiplets within a single package has become crucial for high-performance computing. CoMira’s UCIe (Universal Chiplet Interconnect...
941
20.0
Camera SLVS-EC 2.0 Receiver 5.0Gbps 8-Lane
* The CL12812M8RIP5000 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processor) and DSP. The CL12812M8RI...
942
0.0
MIPI D-PHY 4 Lane CSI-2 TX (Transmitter) in TowerJazz 110nm
The MXL-DPHY-CSI-2-TX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Standard for D-PHY. The...
943
40.0
Camera SLVS-EC 3.0 Receiver 10.0Gbps 8-Lane
* The CL12812M8RIP10000 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processor) and DSP. The CL12812M...
944
15.0
Camera SLVS-EC 3.0 Transmitter 10.0Gbps 8-Lane
* The CL12811M8TIP10000 TXPHY supports 8 TX DATA lanes for up to 10Gbps application. A wide range phase-locked clock is embedded in the IP to suppor...
945
0.0
Display LVDS single link/dual link Transmitter 1.12Gbps 8-Lane
* The CL12491M8TIP160 transmitter converts parallel RGB data and 4bits of HYNC,VSYNC,DE and Control) of CMOS parallel data into serial LVDS data strea...
946
7.0
Display Controller - LCD / OLED Panels (AHB Bus)
The Digital Blocks DB9000AHB TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA 2.0 AHB Bus to a TFT LCD pane...
947
3.0
I2C Master Controller w/FIFO (APB Bus)
The Digital Blocks DB-I2C-M-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC, or other high performance microprocessor via the AMBA 2.0 AP...
948
0.0
RGB to CCIR 601 / 656 Encoder
The Digital Blocks DB1892AXI RGB to CCIR 601 / CCIR 656 Encoder interfaces RGB data along with synchronization signals from a LCD Controller such as D...
949
1.0
BitBLT Graphics Hardware Accelerator (AXI Bus)
The Digital Blocks DB9100AXI3 BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from commands to...
950
1.0
BitBLT Graphics Hardware Accelerator (AHB Bus)
The Digital Blocks DB9100AHB BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from commands to ...