1101 1.0

MIPI C-PHY TX PHY The Innosilicon MIPI C-PHY provides a C-PHY in a single IP core, which integrates a compatible PHY that supports high speed data receiver, plus a MIPI...

1102 1.0

MIPI C/D-PHY TX The Innosilicon MIPI C/D PHY TX integrates a MIPI C-PHY and a MIPI D-PHY in a single IP core, which provides a MIPI high speed data plus low-power low...

1103 1.0

MIPI D-PHY TX The Innosilicon MIPI D-PHY TX provides a MIPI® high speed data plus low-power low speed transmitter that supports data transfer in the bi-directional ...

1104 1.0

MIPI D-PHY TX COMBO LVDS PHY The Innosilicon MIPI D-PHY TX combo LVDS PHY integrates a D-PHY and a LVDS in a single IP core, which provides a MIPI® high speed data plus low-power ...

1105 1.0

MIPI D-PHY TX Combo TTL PHY The Innosilicon MIPI D-PHY TX provides a MIPI® high speed data plus low-power low speed transmitter that supports data transfer in the bi-directional ...

1106 1.0

MIPI D-PHY_2.5G CSI-2 RX IP Innosilicon CSI-2 Receiver implements CSI-2 protocol and MIPI D-PHY protocol. The CSI-2 link protocol specification is a part of group of communicatio...

1107 1.0

MIPI D-PHY_1.2G CSI-2 RX IP Innosilicon CSI-2 Receiver implements CSI-2 protocol and MIPI D-PHY protocol. The CSI-2 link protocol specification is a part of group of communicatio...

1108 1.0

MIPI D-PHY_1.5G CSI-2 RX IP Innosilicon CSI-2 Receiver implements CSI-2 protocol and MIPI D-PHY protocol. The CSI-2 link protocol specification is a part of group of communicatio...

1109 1.0

MIPI D-PHY_4.5G CSI-2 RX IP Innosilicon CSI-2 Receiver implements CSI-2 protocol and MIPI D-PHY protocol. The CSI-2 link protocol specification is a part of group of communicatio...

1110 20.0

MIPI D-PHY/LVDS Combo CSI-2 RX (Receiver) in TSMC 28HPC+ The MXL-LVDS-DPHY-1p5G-CSI-2-RX-T-028HPC+ is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Spe...

1111 1.0

MIPI D-PHY CSI-2 RX IP Innosilicon CSI-2 Receiver implements MIPI CSI-2 protocol as well as D-PHY protocol. The CSI-2 link protocol specification is a part of group of commu...

1112 1.0

MIPI D-PHY Combo LVDS CSI-2 RX IP Innosilicon CSI-2 Receiver implements CSI-2, MIPI D-PHY, and LVDS protocols. The CSI-2 link protocol specification is a part of group of communication...

1113 1.0

MIPI DPHY DSI TX IP Innosilicon MIPI DSI Transmitter implements the DSI protocol as well as MIPI D-PHY protocol. The DSI link protocol specification is a part of group of...

1114 1.0

MIPI D-PHY DSI 1.2G RX IP Innosilicon MIPI DSI receiver implements the MIPI DSI as well as D-PHY protocols. The DSI link protocol specification is a part of group of communicat...

1115 1.0

MIPI D-PHY DSI 1.5G RX IP Innosilicon MIPI DSI RX IP implements the MIPI D-PHY as well as MIPI DSI protocols. The DSI link protocol specification is a part of group of communic...

1116 1.0

MIPI D-PHY DSI TX IP Innosilicon MIPI DSI Transmitter implements the DSI protocol as well as MIPI D-PHY protocol. The DSI link protocol specification is a part of group of...

1117 1.0

MIPI D-PHY Combo LVDS DSI TX IP Innosilicon MIPI DSI Transmitter implements DSI, MIPI D-PHY, and LVDS protocol. The DSI link protocol specification is a part of group of communicatio...

1118 1.0

MIPI DPHY2.0/CPHY1.1 TX (support combo TTL, LVDS, HiSPI) The Innosilicon MIPI C/D PHY TX integrates a MIPI C-PHY and a MIPI D-PHY in a single IP core, which provides a MIPI high speed data plus low-power low...

1119 1.0

MIPI M-PHY INNOSILICON™ M-PHY IP implements the MIPI M-PHY protocol V4.1. The M-PHY protocol specification is a part of a group of communication protocols define...

1120 6.0

32-bit PCI Bus Master/Target 32-bit PCI Bus Master/Target with configurable FIFOs and AHB back end...

1121 0.0

MIPI D-PHY DSI TX (Transmitter) in TSMC 55ULP The MXL-DPHY-DSI-TX-T-55ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification fo...

1122 8.0

Bi-directional High speed interface lane up to 12.5Gbps InCirT offers SerDes which can deliver up to 12.5Gbps per lane for bidirectional data transfer. It consists of programmable receiver front-end and tra...

1123 1.0

64G/56G SerDes The Innosilicon 64G/56G SERDES PHY is a highly configurable PHY capable of supporting speeds up to 56Gbps within a single lane. For this datasheet, th...

1124 1.0

JESD204B Controller JESD204B is a standardized serial interface for communication between logic devices (ASIC or FPGA) and converters (ADC or DAC). Innosilicon’s JESD204B...

1125 1.0

JESD204B PHY & Controller JESD204B is a standardized serial interface for communication between logic devices (ASIC or FPGA) and converters (ADC or DAC). Innosilicon’s JESD204B...

1126 1.0

5G Multi-SerDes For PCIe2.0/USB3.0 PHY The Innosilicon 5Gbps SERDES PHY is a highly configurable PHY capable of supporting speeds up to 5Gbps within a single lane. For this datasheet, the P...

1127 1.0

8G Multi-SerDes For PCIe3.0/USB3.0 PHY The Innosilicon 8Gbps SERDES PHY is a highly configurable PHY capable of supporting speeds up to 8Gbps within a single lane. For this datasheet, the P...

1128 1.0

PCIe2.0 PHY & Controller The Innosilicon SERDES PHY is a highly configurable PHY capable of supporting speeds up to 25Gbps within a single lane. For this particular datasheet,...

1129 1.0

PCIe2.1 PHY The Innosilicon SERDES PHY is a highly configurable PHY capable of supporting speeds up to 25Gbps within a single lane. For this particular datasheet,...

1130 1.0

PCIe3.0 Controller The Innosilicon Gen1/2/3 PCI Express Controller provides a PCI Express Root Complex (RC) and Endpoint (EP) application. It’s a high performance, high ...

1131 1.0

PCIe3.0 PHY The Innosilicon PCIe3.0 PHY is a highly configurable PHY capable of supporting speeds up to 8Gbps within a single lane. For this particular datasheet,...

1132 20.0

MIPI D-PHY Universal IP in TSMC 28HPC+ The MXL-DPHY-UNIV-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...

1133 1.0

PCIe4.0 Controller The Innosilicon Gen1/2/3/4 PCI Express Controller provides a PCI Express Root Complex (RC) and Endpoint (EP) application. It’s a high performance, hig...

1134 1.0

PCIe4.0 PHY The Innosilicon PCIe4.0 PHY is a highly configurable PHY capable of supporting speeds up to 16Gbps within a single lane. For this particular datasheet...

1135 1.0

PCIe5.0 PHY & Controller The Innosilicon Gen1/2/3/4/5 PCI Express Controller provides a PCI Express Root Complex (RC) and Endpoint (EP) application. It’s a high performance, h...

1136 1.0

SGMII PHY The Innosilicon SGMII PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the IEEE802.3 1000BAS...

1137 1.0

PCIe4/3/2/1 PHY & Controller The Innosilicon PCIe4.0 PHY is a highly configurable PHY capable of supporting speeds up to 16Gbps within a single lane. For this particular datasheet...

1138 6.0

USB 2.0 Host Controller The USB 2.0 Host Controller core (GRUSBHC) provides a link between the AMBA on-chip bus and the Universal Serial Bus (USB). The host controller suppor...

1139 6.0

USB 2.0 Device Controller The Universal Serial Bus Device Controller provides a USB 2.0 function interface accessible from an AMBA-AHB bus interface. The core must be connected...

1140 1.0

Type-C PHY Innosilicon Type-C IP is composed of the physical layer and the PHY logic. The physical layer contains 4 data channels, an AUX channel and bias circui...

1141 1.0

USB3.1/3.0 PHY & Controller The Innosilicon USB3.0 PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the PHY Interface fo...

1142 1.0

USB 3.0 DRD Controller Innosilicon USB3.0 DRD Controller provides a USB3.0-compliant host/device controller solution. This controller can be programmed to support data trans...

1143 25.0

MIPI D-PHY CSI-2 RX+ IP in TSMC 28HPC+ for Automotive Applications The MXL-DPHY-CSI-RX+-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...

1144 1.0

USB2.0 OTG PHY The INNO USB 2.0 PHY conforms to the specification of UTMI+ level 3 Revision 1.0 (USB 2.0 Transceiver Macrocell Interface Plus) and has excellent perf...

1145 1.0

USB 2.0 DRD Controller Innosilicon USB2.0 DRD Controller provides a USB2.0-compliant host/device controller solution. This controller can be programmed to support data trans...

1146 1.0

USB3.2 PHY & Controller INNOSILICON™ USB3.2 Controller and PHY IP is a highly customizable IP module that converts high-speed serial data into parallel data, and is compliant...

1147 20.0

USB2.0 PHY, 8-bit or a 16-bit parallel interface, remaining backward compatible with USB1.1 legacy protocol at 12Mbps KA13UGUSB20ST001 is USB2.0 physical layer transceiver (PHY) integrated circuits. The PHY can be configured for either an 8-bit or a 16-bit parallel in...

1148 2.0

AMBA interface for Actel MIL-STD-1553B Cores The GR1553 is a set of AMBA AHB/APB wrappers for the Actel AX/RTAX MIL-STD-1553B cores. Wrappers for the following Actel cores are provided: Core1553B...

1149 6.0

Spacewire Codec with AHB host interface The GRSPW core implements a Spacewire Codec with RMAP support and AMBA host interface. The core implements the Spacewire standard with the protocol id...

1150 6.0

10/100 Mbit Ethernet MAC The GRETH core implements 10/100 Mbit/s Ethernet Media Access Controller (MAC) with AMBA host interface. The core implements the 802.3-2002 Ethernet s...