Design & Reuse
1928 IP
1301
0.0
SPI to AHB Lite Bridge
The ISPI Slave to AHB Lite Master is commonly used as a monitor interface to allow external devices to access the internal AHB bus. A SPI Slave to ...
1302
1.0
SMIC 0.13um USB 1.1 PHY
The USB1.1 PHY is an IP version of USB transceiver designed in standard logic to interface the physical layer of Universal Serial Bus. It receives dat...
1303
1.0
SMIC 65nm USB2.0 Dual Role PHY
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...
1304
1.0
GSMC 0.18um USB 1.1 PHY
The USB1.1 PHY is an IP version of USB transceiver. It receives data via DP and DM, and transfers data to USB1.1 core via RCV, VM and VP. It is design...
1305
1.0
TSMC 55nm USB2.0 Dual Role PHY
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...
1306
1.0
HLMC 55nm EF MIPI DPHY V1.2
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of Bi-directional 1-Clock and 4-Data lanes. It can support both...
1307
1.0
GLOBALFOUNDRIES 22nm FDX MIPI DPHY Slave V1.2
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of 1-Clock and 4-Data lanes. It can support Slave side. Each l...
1308
1.0
GLOBALFOUNDRIES 22nm FDX MIPI CDPHY TX V2.1/V3.0
This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v2.1 and D-PHY v3.0”, which consists of Bi-directional 1-Clock and 4-Data lanes. It c...
1309
1.0
SMIC 0.11um USB2.0 Dual Role PHY
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...
1310
1.0
GLOBALFOUNDARIES 22nm FDSOI USB3.0 Dual Role PHY/OTG PHY
This USB3.0 PHY IP is designed according to USB3.0 and USB2.0 specification. It supports the USB3.0 5Gbps Super-Speed mode and is backward compatible ...
1311
6.0
USB 2.0 Device Controller (IF Certified)
...
1312
10.0
AHB QSPI Controller with Execute in Place (XIP)
The Quad Serial Peripheral Interface (OSPI) core is a serial data link (SPI) master which controls an external serial FLASH device. Reading and wri...
1313
6.0
USB 1.1 Open Host Controller
...
1314
6.0
USB 2.0 Host Controller (EHCI)
...
1315
5.0
USB 2.0 Hub Controller
...
1316
6.0
USB 1.1 Hub Controller
...
1317
6.0
Embedded Host Controller 1. 1
...
1318
6.0
Embedded Host Controller 2.0
...
1319
6.0
USB2.0 On-The-Go
VinChip’s USB 2.0 High Speed OTG controller is designed for flexibility and ease of use and facilitates implementation of a wide variety of applicatio...
1320
6.0
AHB To PCI Wrapper
VinChip’s AHB to PCI wrapper can be used to verify AHB (AMBA) based systems on a PCI environment for ease of debugging the target hardware and it can ...
1321
3.0
USB 3.0 Device
...
1322
4.0
USB 3.0 Hub
...
1323
0.0
AHB Single Channel DMA Controller
The DMA is a configurable single channel direct memory access controller. The DMA IP Core is a Verilog HDL design that can be used in ASIC, Structured...
1324
15.0
High Performance Second Generation Extended MIPI CSI2 Receiver
Latest and forthcoming CMOS image sensors surpass 10M pixels, and output video at 30 and even 60 fps. This development requires high bandwidth betwe...
1325
15.0
Extended MIPI CSI2 Serial Video Receiver, 64 bits, 8 data lanes, 4 pixels/clock
Latest and forthcoming CMOS image sensors surpass 10M pixels, and output video at 30 and even 60 fps. This development requires high bandwidth betwe...
1326
40.0
PCIe Gen6 Controller
Our latest PCIe gen 6 controller IP, which is "NoC aware", provides a high-speed interface for efficient data transfer and system communication, suppo...
1327
40.0
DP/eDP1.4b RX PHY
Silicon Library's eDP/DP1.4b RX PHY IP supports 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps, depending on the technology node. This silicon proven IP is a...
1328
15.0
DP/eDP1.4b RX Controller
Silicon Library’seDP/DP1.4b RX Controller works with PHY IPs by Silicon Library or customers' PHYs....
1329
40.0
DP/eDP1.4b TX PHY
Silicon Library's eDP/DP1.4b TX PHY IP supports 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps, depending on the technology node. This silicon proven IP is a...
1330
15.0
DP/eDP1.4b TX Controller
Silicon Library’seDP/DP1.4b TX Controller works with PHY IPs by Silicon Library or customers' PHYs....
1331
20.0
MIPI D-PHY TX
Silicon Library's MIPI DPHY 1.2 Tx PHY IP supports data rates up to 1.5Gbps and 2.5Gbps per lane (in HS), depending on the technology node. This sili...
1332
20.0
MIPI D-PHY RX
Silicon Library's MIPI DPHY 1.2 Rx PHY IP supports data rates up to 1.5Gbps. This IP includes two PLLs. This silicon proven IP is available in variou...
1333
20.0
HDMI1.4 RX PHY
Silicon Library's HDMI 1.4b RX IP supports up to 3Gbps. This silicon proven IP is available in various fabs/nodes including TSMC55/65, GF55/65 and UM...
1334
10.0
USB 3.0 PHY in GF (65nm, 55nm, 40nm, 28nm)
The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...
1335
0.0
AHB 4 Channel DMA Controller
The DMA is a multiple-channel direct memory access controller. The DMA IP Core is a Verilog HDL design that can be used in ASIC, Structured ASIC and F...
1336
10.0
HDMI1.4 RX LINK
Silicon Library's HDMI1.4b RX Link IP is the best choice for our PHY IPs. Customer's function can be included on request....
1337
20.0
HDMI2.0 RX PHY
Silicon Library's HDMI 2.0 RX IP supports up to 6Gbps. This silicon proven IP is available in TSMC12/40. Please also refer to our LINK IP....
1338
10.0
HDMI2.0 RX LINK
Silicon Library's HDMI2.0 RX Link IP is the best choice for our PHY IPs. Customer's function can be included on request....
1339
20.0
HDMI1.4 TX PHY
Silicon Library's HDMI 1.4b TX PHY IP supports up to 3Gbps. This silicon proven IP is available in various fabs/nodes including TSMC40/55/65/85/90/11...
1340
10.0
HDMI1.4 TX LINK
Silicon Library's HDMI1.4b TX Link IP is the best choice for our PHY IPs. Customer's function can be included on request....
1341
20.0
HDMI2.0 TX PHY
Silicon Library's HDMI 2.0 TX PHY IP supports up to 6Gbps. This silicon proven IP is available in TSMC12. Please also refer to our LINK IP....
1342
10.0
HDMI2.0 TX LINK
Silicon Library's HDMI2.0 TX Link IP is the best choice for our PHY IPs. Customer's function can be included on request....
1343
0.0
AHB to APB Bus Bridge
The AHB to APB Bridge translates an AHB bus transaction (read or write) to an APB bus transaction. This is accomplished via two small state machines ...
1344
0.0
AHB External Bus Interface
The AHB External Bus Interface (EBI) allows a CPU or AHB Master (such as a DMA core) to transmit and receive data to an external device such as an ext...
1345
25.0
I3C Advanced Controller, V1.1
I3C is a new a standard from the MIPI Alliance that unifies and extends the legacy interfaces of I2C and SPI and adds new powerful features to sup...
1346
25.0
I3C Autonomous Target, V1.1
The I3C Autonomous Target is intended for simple, data acquisition types of applications where a microprocessor is not needed to process the data....
1347
25.0
I3C Advanced Target, V1.1
The I3C Advanced Target is a highly configurable I3C Target that can be used in microcontroller based environments to provide I3C connectivity to ...
1348
25.0
I3C Advanced Controller, V1.1 Lite
The I3C Advanced Controller Lite is a highly configurable I3C controller that can be used in microcontroller-based environments to provide I3C con...
1349
25.0
I3C Advanced Target, V 1.1 Lite
The I3C Advanced Target Lite is a highly configurable I3C Target that can be used in microcontroller based environments to provide I3C connectivit...
1350
3.0
MIPI SPMI Slave IP
SmartDV’s MIPI SPMI (System Power Management Interface) Slave IP is a silicon-proven solution tailored for efficient communication with power manageme...