1351 50.0

TSMC 3nm (N3E) 1.5V LVDS Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

1352 0.0

AHB-Lite to AHB-Lite Asynchronous Bridge The AHB-Lite to AHB-Lite Asynchronous Bridge translates an AHB-Lite bus transaction (read or write) on one clock domain to an AHB-Lite bus transacti...

1353 50.0

TSMC 3nm (N3E) 1.2V LVDS Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

1354 20.0

TSMC 7nm (7FF) 1.8V LVDS Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

1355 20.0

IO 1.8V LVDS in GF (22nm) Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

1356 20.0

IO 3.3V LVDS Rx in GF (12nm) Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

1357 20.0

IO 1.8V LVDS Rx in GF (12nm) Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

1358 20.0

TSMC 6nm (6FF) 3.3V SMBUS (I2C) IO Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...

1359 0.0

AHB Secure Subsystem - ARM Cortex M3 The Silvaco Secure AHB Performance Subsystem is a high-performance AHB subsystem that allows for a high level of hardware and software security. It in...

1360 20.0

IO I2C 3.3V in GF (22nm) Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...

1361 20.0

1.8V/3.3V I2C in GF (12nm) Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...

1362 20.0

TSMC 6nm (N6) 3.3V Basekit Libraries Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...

1363 20.0

TSMC 5nm (N5) 1.2V/1.8V Basekit Libraries Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

1364 20.0

TSMC 4nm (N4P) 1.2V/1.8V Basekit Libraries Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...

1365 20.0

TSMC 4nm (N4P) 1.2V/1.8V Basekit Libraries, multiple metalstacks Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...

1366 20.0

TSMC 4nm (N4P) 2.5V Basekit Libraries Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...

1367 20.0

TSMC 4nm (N4P) 2.5V Basekit Libraries, multiple metalstacks Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...

1368 50.0

TSMC 3nm (N3E) GPIO Basekit Libraries Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

1369 6.0

AXI- Interconnect : Advanced Extensible Interface Bus IP The AMBA AXI protocol is targeted at high-performance, high-frequency system designs and includes a number of features that make it suitable for high-...

1370 10.0

USB 2.0 femtoPHY in GF (28nm, 22nm, 12nm) The Synopsys IP USB 2.0 femtoPHY provides designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications su...

1371 10.0

USB 2.0 nanoPHY in GF (55nm) The Synopsys USB 2.0 nanoPHY provides designers with a complete Physical Layer (PHY) IP solution, designed for low-power mobile and consumer applicati...

1372 10.0

USB 2.0 picoPHY in GF (40nm, 28nm) The Synopsys USB 2.0 picoPHY provides designers with a complete physical (PHY) layer IP solution, designed for low power mobile and consumer applicati...

1373 10.0

USB 3.0 SSPHY in GF (22nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1374 10.0

USB 3.1 PHY (10G/5G) in GF (22nm) The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1375 50.0

USB-C 3.1 DP/TX PHY ebdaux in TSMC (N6C, N5, N4P, N4C, N3E) The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1376 6.0

I2C Master/Slave Controller Core IP I2C Master/Slave Controller core implements a bidirectional serial interface compatible with the NXP’s I2C bus specification and supports all transfer...

1377 10.0

USB-C 3.1/DP TX PHY in GF (22nm) The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1378 10.0

USB-C 3.2 DP/TX PHY ebdaux in TSMC (N5, N4C) The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or...

1379 10.0

USB-C 3.2 DP/TX PHY in GF (12nm) The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or...

1380 50.0

USB-C 3.2 DP/TX PHY in TSMC (N3P) The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or...

1381 10.0

USB-C 3.2 SS/SSP PHY in Type-C in Samsung (SF4X, SF4E, SF2) The Synopsys SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum. The USB 3.2 IP offering includes con...

1382 100.0

USB4 PHY in TSMC (N7, N6, N5, N4P, N3E, N3P) The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...

1383 100.0

USB4 PHY in Samsung (SF4X) The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...

1384 20.0

MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1385 50.0

MIPI C-PHY v1.0 D-PHY v1.2 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1386 10.0

USB 3.0 PHY in SMIC (110nm, 65nm, 40nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1387 6.0

USB based High Speed System Debug IP Architecture Independent Design Supports any AMBA AHB based System Easily portable to other buses such as Avalon Standard USB 2.0 interface to th...

1388 20.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (16nm, N6, N6C, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1389 20.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1390 20.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (16nm, 12nm, N4C, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1391 50.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N4, N4P, N3E, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1392 20.0

MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (12nm, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1393 50.0

MIPI C-PHY v1.0 D-PHY v1.2 TX 2 trios/2 Lanes in TSMC (12nm, N5, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1394 2.0

Super Speed USB 3.0 Extensible Host Controller xHCI ...

1395 50.0

MIPI C-PHY v2.0 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (N7, N6, N5, N4, N4C, N3E, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1396 50.0

MIPI C-PHY v2.0 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (N6, N6C, N5, N4P, N4C, N3P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1397 20.0

MIPI D-PHY Bidirectional 2 Lanes in GF (40nm, 28nm, 22nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

1398 20.0

MIPI D-PHY Bidirectional 2 Lanes in SMIC (40nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

1399 20.0

MIPI D-PHY Bidirectional 2 Lanes in TSMC (40nm, 28nm, 16nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

1400 20.0

MIPI D-PHY Bidirectional 4 Lanes in GF (40nm, 28nm, 22nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...