1501 10.0

28G LR Ethernet PHY in GF (12nm) The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...

1502 50.0

32G PHY in TSMC (16nm, 12nm, N7, N6, N5, N5A, N4C, N3E, N3P) The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...

1503 10.0

32G PHY in GF (12nm, N7) The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...

1504 10.0

12G Ethernet PHY in TSMC (28nm, 16nm, 12nm) The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...

1505 10.0

12G Ethernet PHY in Samsung (14nm) The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...

1506 100.0

UCIe-S PHY for Standard Package (x16) in Samsung (SF5A, SF4X, SF2) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

1507 100.0

UCIe-S PHY for Standard Package (x16) in TSMC (N7, N6, N4P, N5, N3) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

1508 100.0

UCIe-A PHY for Advanced Package (x64) in TSMC (N7, N6, N5, N3) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

1509 3.0

I2C Slave Controller - Low Power, Low Noise Config of User Registers The DB-I2C-S-SCL-CLK is an I2C Slave Controller IP Core focused on low power, low noise ASIC / ASSP designs requiring the configuration & control of r...

1510 10.0

Die-to-Die, 112G Ultra-Extra Short Reach PHY in TSMC (12nm, N7, N6, N5) The Synopsys XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modul...

1511 10.0

Die-to-Die, 112G Ultra-Extra Short Reach PHY in GF (12nm) The Synopsys XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modul...

1512 10.0

USB 3.1/DisplayPort 1.4 IP Subsystem Solution The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1513 10.0

USB 3.1/DisplayPort 1.3 Controller IP Solutions The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1514 100.0

USB4 Controller & Router IP The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...

1515 10.0

Configurable controllers for PCIe 6.0 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...

1516 10.0

Configurable controllers for PCIe 4.0 and CCIX supporting Dual Mode applications The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...

1517 20.0

MIPI DSI-2 host/device controllers for high-speed serial interface between application processor and displays Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

1518 5.0

SPI Master / Slave Controller w/FIFO (APB Bus) The Digital Blocks DB-SPI-MS is a Serial Port Interface (SPI) Controller Verilog IP Core supporting both Master/Slave SPI Bus transfers. The DB-SPI-MS...

1519 10.0

Configurable CCIX controllers for CCIX 32G supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications Synopsys’ complete CCIX IP solution consisting of controller, PHY and verification IP, delivers data transfer rates up to 32GT/s and supports cache c...

1520 10.0

Supports all key features and performance requirements in the CXL 3.0, 2.0, 1.1 and 1.0 specifications The Synopsys Compute Express Link (CXL) Controller IP implements the port logic required to build a CXL device, host or switch, and can be configured ...

1521 10.0

Die-to-Die Controller IP The Synopsys Die-to-Die Controller IP, optimized for latency, bandwidth, power and area, enables efficient inter-die connectivity in server, AI accele...

1522 10.0

VESA DSC Encoder and Decoder IP Solutions Synopsys VESA Display Stream Compression (DSC) Encoder and Decoder IP provides a video compression solution for up to 10K ultra-high-definition displa...

1523 100.0

Universal Chiplet Interconnect Express (UCIe) Controller Synopsys UCIe Controller IP is comprised of the Die-to-Die Adapter layer and Protocol layer for widely used protocols such as PCI Express and CXL. The...

1524 0.0

MIPI D-PHY v1.2 RX 2 Lanes in Samsung (8nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

1525 0.0

MIPI D-PHY v1.2 TX 4 Lanes in Samsung (8nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

1526 0.0

PCIe 7.0 Integrity and Data Encryption (IDE) Security IP Module PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...

1527 0.0

UCIe Controller for Streaming Protocols Synopsys UCIe Controller IP is comprised of the Die-to-Die Adapter layer and Protocol layer for widely used protocols such as PCI Express and CXL. The...

1528 10.0

USB 3.0 PHY in Samsung (28nm, 14nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1529 0.0

SPI Master / Slave Controller w/FIFO (AHB & AHB-Lite Bus) The Digital Blocks DB-SPI-MS is a Serial Port Interface (SPI) Controller Verilog IP Core supporting both Master/Slave SPI Bus transfers. The DB-SPI-MS...

1530 0.0

PCIe 6.0 PHY NCS IP for TSMC (N3E, N3P) The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...

1531 100.0

PCIe 7.0 PHY in TSMC (N5, N4P, N4C, N3P, N2P) The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...

1532 0.0

UCIe-A PHY for Advanced Package (x64) in Samsung (SF4X) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

1533 0.0

UCIe-A PHY for Advanced Package (x64) in TSMC (N5) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

1534 0.0

UCIe-A PHY for Advanced Package (x64) in Samsung (SF2) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

1535 0.0

UCIe-S PHY for Standard Package (x32) in TSMC (N3P) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

1536 0.0

PCIe 3.0 PHY in Samsung (SF5A The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

1537 0.0

UCIe PHY IP on TSMC N3P Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

1538 0.0

SPI Master / Slave Controller w/FIFO (AXI & AXI-Lite Bus) The Digital Blocks DB-SPI-MS is a Serial Port Interface (SPI) Controller Verilog IP Core supporting both Master/Slave SPI Bus transfers. The DB-SPI-MS...

1539 0.0

PCIe 6.0 PHY IP for TSMC N5 The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...

1540 0.0

USB4 PHY - SS SF2, North/South Poly Orientation The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...

1541 70.0

40G UCIe PHY IP on Samsung SF4X Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...

1542 0.0

28G Ethernet PHY IP for TSMC N7 The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...

1543 0.0

PCIe 5.0 PHY for TSMC N3P The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s applicatio...

1544 0.0

PCIe 5.0 PHY for TSMC N7 The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s applicatio...

1545 0.0

USB4 PHY IP for TSMC N3E The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...

1546 0.0

Synopsys PCIe 4.0 PHY IP for TSMC N7 The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

1547 7.0

Display Controller - LCD / OLED Panels (AHB-Lite Bus) The Digital Blocks DB9000AHB-Lite TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA 3.0 AHB-Lite Bus V1.0 to...

1548 0.0

Multiprotocol 10G PHY in TSMC (16nm, N7) The multi-lane Synopsys IP Multi-Protocol 10G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio, meeting the growing need...

1549 0.0

112G VSR PHY in TSMC (N5, N3P) Synopsys IP Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high perfor...

1550 0.0

112G PHY in TSMC (N7, N5) Synopsys IP Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high perfor...