1801 0.0

APB UART with optional ISO7816-3 The eSi-UART core can be used to implement asynchronous serial communications. It is ideally suited for implementing RS232 or ISO7816-3 for smartcard ...

1802 0.0

APB SPI (Serial Peripheral Interface) master and slave The eSi-SPI core is a Serial Peripheral Interface that can be used to implement full-duplex, synchronous, serial communications between ICs. The eSi-S...

1803 0.0

APB I2C master and slave The eSi-I2C core implements the I2C two-wire protocol. It supports operation as both an I2C master and slave. The I2C is supplied with an AMBA APB sla...

1804 15.0

USB 2.0 On-chip oscillator, termination resistors, and DP/DM short circuit protection (0.18u) The KA18USB20 consists of the digital and analog blocks of the USB Transceiver Macrocell (UTMI) specifications. This macrocell is certified and compli...

1805 0.0

PCIe 7.0 Controller (can be configured to support EP, RP, DM, or SW applications) The configurable and scalable Synopsys Controller IP for PCI Express® (PCIe®) 7.0 supports all required features of the PCI Express 7.0 specification,...

1806 0.0

PCIe 5.0 Premium Controller with AXI bridge & Advanced HPC Features (Arm CCA) The complete silicon-proven DesignWare® IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Securit...

1807 20.0

PCIe 2.0 PHY in SMIC (40nm, 28nm) The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...

1808 5.0

SAS 4 Port 12G Recorder The SAS Recorder IP Core provides an ready to use solution for high speed data recording applications. Simple interface guarantees fast time to marke...

1809 5.0

SAS Initiator, 12G, 4 Ports, 48 Gbps, SATA Host The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...

1810 1.0

crystalless USB1.1 PHY The USB1.1 PHY is an IP version of USB transceiver designed in standard logic to interface the physical layer of Universal Serial Bus. It receives dat...

1811 1.0

SMIC 55nm sub-LVDS Receiver The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors. The receiver consists of PHY only....

1812 1.0

SMIC 55nm sub-LVDS Receiver The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors. The receiver consists of PHY only....

1813 1.0

ST28nm LVDS Transmitter The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...

1814 1.0

SMIC 110nm MIPI DPHY This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of Bi-directional 1-Clock and 4-Data lanes. It can support both...

1815 1.0

SMIC 55nm LL MIPI DPHY This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.1”, which consists of Bi-directional 1-Clock and 4-Data lanes. It can support both...

1816 1.0

GLOBALFOUNDRIES 0.11um USB2.0 Dual Role PHY The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...

1817 1.0

GLOBALFOUNDRIES 0.13um USB2.0 Dual Role PHY The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...

1818 0.0

I2C Bus Master Controller Core The I2C-MS core is a controller for the Inter-Integrated Circuit (I2C) bus. The highly configurable core can implement an I2C bus master, slave, or a ...

1819 20.0

PCIe 2.0 PHY in TSMC (28nm, 16nm, 12nm) The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...

1820 20.0

PCIe 2.0 PHY in UMC (40nm, 28nm) The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...

1821 20.0

PCIe 3.0 PHY in UMC (28nm) The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

1822 20.0

PCIe 4.0 PHY in Samsung (14nm, 11nm, SF5A, SF2) The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

1823 50.0

PCIe 4.0 PHY in TSMC (28nm, 16nm, 12nm, N7, N3P) The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

1824 50.0

PCIe 5.0 PHY in TSMC (16nm, 12nm, N7, N6, N5, N4P, N4C, N3E, N3P) The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s applicatio...

1825 20.0

IP Prototyping Kits for USB, DDR, MIPI, PCI Express protocols The Synopsys IP Prototyping Kits, part of the IP Accelerated initiative, center around a complete, out-of-the-box reference design that consists of a ...

1826 10.0

USB 3.1 Controller IP The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1827 10.0

USB 3.0 Digital Controller IP The Synopsys SuperSpeed USB IP solution is implemented in hundreds of designs and shipped in millions of units. The USB IP solution is based on the US...

1828 10.0

USB 1.1 Digital Controller IP The Synopsys USB 1.1 Controllers support Full and Low Speed based on USB specification from the USB Implementer Forum. The Synopsys USB 1.1 IP offerin...

1829 10.0

I2C & SMBus Controller The I2C-SMBUS core implements a serial interface controller for the Inter-Integrated Circuit (I2C) bus and the System Management Bus (SMBus). The cor...

1830 10.0

USB 2.0 Digital Controller IP The Synopsys USB 2.0 Controllers support Hi-Speed (480 Mbps), Full Speed (12 Mbps), and Low Speed (1.5 Mbps) operation based on USB specification from...

1831 10.0

USB 3.2 Controller IP The Synopsys SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum. The USB 3.2 IP offering includes con...

1832 10.0

Configurable controllers for PCIe 2.0/1.0 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...

1833 10.0

Configurable controllers for PCIe 3.1 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...

1834 10.0

Configurable controllers for PCIe 4.0 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...

1835 10.0

Configurable controllers for PCIe 5.0 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...

1836 10.0

Configurable CCIX controllers for CCIX 25G supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications Synopsys’ complete CCIX IP solution consisting of controller, PHY and verification IP, delivers data transfer rates up to 32GT/s and supports cache co...

1837 20.0

MIPI CSI-2 host/device controllers for high-speed serial interface between image processor and camera sensors Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

1838 4.0

AHB Cache Controller Core The CACHE-CTRL IP core is a flexible cache memory controller providing a 32-bit slave AHB processor interface and a 32-bit master AHB interface to the...

1839 20.0

MIPI DSI-2 controllers with VESA DSC for high-speed serial interface between application processor and displays Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

1840 20.0

MIPI I3C controller delivers high bandwidth and scalability for integration of multiple sensors Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

1841 20.0

MIPI UniPro IP for reliable, high-performance and low power link between devices in mobile devices Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

1842 10.0

IP Solutions for the AMBA Interconnect The Synopsys IP solutions for the ARM® AMBA® interconnect include synthesizable IP, verification IP (VIP) and automated assembly with Synopsys’ coreAs...

1843 20.0

Pre-verified Interface IP Subsystems reduce design risk and accelerate time-to-market Customers are increasingly utilizing third-party standards-based IP in their designs, but face several challenges. With more IP and more complex inter...

1844 10.0

UFS Host Controller IP Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

1845 100.0

CXL 2.0 Integrity and Data Encryption Security Module The Compute Express Link (CXL) interface protocol enables low-latency data communication between system-on-chip (SoC) and general-purpose accelerators...

1846 0.0

High Speed Access & Test IP PCIE Version High speed access for test and in-chip sensor & monitor data throughout the silicon lifecycle. Within the SiliconMAX Platform, High-Speed Access & Tes...

1847 0.0

High Speed Access & Test IP USB Version High speed access for test and in-chip sensor & monitor data throughout the silicon lifecycle. Within the SiliconMAX Platform, High-Speed Access & Tes...

1848 23.0

MIPI C-PHY TRx(80-2500Msps) / MIPI D-PHY TRx(80-4500Mbps) Combo PHY 5nm The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 4.5Gbps for D-PHY and 2.5Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), an...

1849 0.0

SENT/SAE J2716 Controller The CSENT core implements a controller for the Single Edge Nibble Transmission (SENT) protocol. It complies with the SAE J2716 standard and also the i...

1850 10.0

32G PHY in Samsung (10nm, 8nm, 4nm, 5nm, SF2) The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and c...