1801 0.0

MIPI SPMI Slave DMA IP SmartDV’s MIPI SPMI Slave to DMA Bridge IP is a silicon-proven solution that enables efficient data transfer between MIPI SPMI interfaces and DMA bloc...

1802 0.0

PCI Master/Slave IP PCI MASTER SLAVE interface provides full support for the PCI MASTER SLAVE synchronous serial interface, compatible with PCI 2.0 specification. Through...

1803 0.0

SAS Initiator IP The SAS Initiator IP core is fully compliant with Serial ATA SCSI 5.0 Specification. Through its compatibility, it provides a simple interface to a wi...

1804 0.0

SATA Host Controller IP SATA HOST CONTROLLER core is compliant with SATA version 3.5 specification. Through its compatibility, it provides a simple interface to a wide range...

1805 10.0

25G PHY in TSMC (16nm, 12nm, N7, N6) The multi-lane Synopsys Multi-Protocol 25G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and ...

1806 0.0

TileLink To AHB Bridge IP TileLink to AHB Bridge IP core is compliant with SiFive Tilelink and AMBA AHB Specification. Through its compatibility,it provides a simple interface ...

1807 0.0

TileLink To APB Bridge IP Tilelink2apb Bridge IP core is compliant with SiFive Tilelink and AMBA APB Specification. Through its compatibility, it provides a simple interface to...

1808 0.0

USB 1.x Device IP USB 1.x Device interface provides full support for the USB1.x synchronous serial interface, compatible with USB 1.1 specification. Through its USB1.x ...

1809 0.0

USB 2.x Device IP USB 2.x Device interface provides full support for the USB2.x synchronous serial interface, compatible with USB 2.0 specification. Through its USB2.x ...

1810 0.0

USB 2.x Host IP USB 2.x Host interface provides full support for the USB2.x synchronous serial interface, compatible with USB 2.0 specification. Through its USB2.x co...

1811 0.0

USB 2.x Hub IP USB 2.x HUB interface provides full support for the USB2.x synchronous serial interface, compatible with USB 2.0 specification. Through its USB2.x com...

1812 0.0

USB 2.x OTG IP USB 2.x OTG interface provides full support for the USB2.x synchronous serial interface, compatible with USB 2.0 specification. Through its USB2.x com...

1813 0.0

USB 3.x Device IP USB 3.x Device interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specification. Through its...

1814 0.0

USB 3.x Hub IP USB 3.x HUB interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specification. Through its US...

1815 0.0

USB 3.x OTG IP USB 3.x OTG interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specification. Through its US...

1816 50.0

56G Ethernet PHY in TSMC (16nm, 12nm) The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...

1817 0.0

USB PD IP USB PD interface provides full support for the USB PD synchronous serial interface, compatible with USB 3.1/3.0/2.0 and 1.0 specifications. Through it...

1818 0.0

USB Type-C IP USB TYPE C interface provides full support for the USB TYPE C synchronous serial interface, compatible with USB 3.0/2.0 and 1.0 specifications. Throug...

1819 0.0

USB3.x Host IP USB3.x Host interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specification. Through its US...

1820 0.0

V-By-One Receiver IP VBYONE Receiver core is compliant with standard VByOne specification as 1.2/1.3/1.4. Through its compatibility, it provides a simple interface to a wi...

1821 0.0

V-By-One Transmitter IP VBYONE Transmitter core is compliant with standard VByOne specification as 1.2/1.3/1.4. Through its compatibility, it provides a simple interface to a...

1822 4.0556

Open-drain I2C and SMBUS, DDC, CEC & HPD IO offerings Certus is pleased to offer I2C open-drain IOs across multiple process technologies. The Certus I2C IO can support external supplies of 1.8V, 3.3V and...

1823 0.0

PCIe 7.0 PHY for TSMC N5 The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...

1824 0.0

PCIe 7.0 Controller with AXI The Rambus PCI Express® (PCIe®) 7.0 Controller with AXI is a configurable and scalable design for ASIC implementations. It is backward compatible to P...

1825 20.0

PCIe 2.0 PHY in Fujitsu (40nm) The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...

1826 2.0

MIPI DSI-2 RX Controller The Display Serial Interface 2 (DSI-2) Receiver (RX) Controller is a digital core that implements all protocol functions defined in the MIPI Alliance ...

1827 0.0

USB2.0 OTG IP This IP is developed as the USB2.0 OTG PHY. This PHY consists of an analog PHY and a PCS layer. The PCS section includes basic encoding and decoding a...

1828 195.0

PCIe 7.0 Switch The Rambus PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enable...

1829 50.0

32G Multi Rate SerDes PHY - GlobalFoundries 22FDX Extoll’s SerDes architecture is based on digital design elements and methodologies. Plain analog blocks are only used where absolutely necessary. Vari...

1830 0.0

APB UART with optional ISO7816-3 The eSi-UART core can be used to implement asynchronous serial communications. It is ideally suited for implementing RS232 or ISO7816-3 for smartcard ...

1831 0.0

APB SPI (Serial Peripheral Interface) master and slave The eSi-SPI core is a Serial Peripheral Interface that can be used to implement full-duplex, synchronous, serial communications between ICs. The eSi-S...

1832 0.0

APB I2C master and slave The eSi-I2C core implements the I2C two-wire protocol. It supports operation as both an I2C master and slave. The I2C is supplied with an AMBA APB sla...

1833 5.0

USB 2.0 On-chip oscillator, termination resistors, and DP/DM short circuit protection (0.18u) The KA18USB20 consists of the digital and analog blocks of the USB Transceiver Macrocell (UTMI) specifications. This macrocell is certified and compli...

1834 0.0

PCIe 7.0 Controller (can be configured to support EP, RP, DM, or SW applications) The configurable and scalable Synopsys Controller IP for PCI Express® (PCIe®) 7.0 supports all required features of the PCI Express 7.0 specification,...

1835 0.0

PCIe 5.0 Premium Controller with AXI bridge & Advanced HPC Features (Arm CCA) The complete silicon-proven DesignWare® IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Securit...

1836 20.0

PCIe 2.0 PHY in SMIC (40nm, 28nm) The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...

1837 5.0

SAS 4 Port 12G Recorder The SAS Recorder IP Core provides an ready to use solution for high speed data recording applications. Simple interface guarantees fast time to marke...

1838 5.0

SAS Initiator, 12G, 4 Ports, 48 Gbps, SATA Host The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment of mass storage devi...

1839 1.0

crystalless USB1.1 PHY The USB1.1 PHY is an IP version of USB transceiver designed in standard logic to interface the physical layer of Universal Serial Bus. It receives dat...

1840 1.0

SMIC 110nm MIPI DPHY This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of Bi-directional 1-Clock and 4-Data lanes. It can support both...

1841 1.0

SMIC 55nm LL MIPI DPHY This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.1”, which consists of Bi-directional 1-Clock and 4-Data lanes. It can support both...

1842 1.0

GLOBALFOUNDRIES 0.11um USB2.0 Dual Role PHY The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...

1843 1.0

GLOBALFOUNDRIES 0.13um USB2.0 Dual Role PHY The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...

1844 0.0

I2C Bus Master Controller Core The I2C-MS core is a controller for the Inter-Integrated Circuit (I2C) bus. The highly configurable core can implement an I2C bus master, slave, or a ...

1845 20.0

PCIe 2.0 PHY in TSMC (28nm, 16nm, 12nm) The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...

1846 20.0

PCIe 2.0 PHY in UMC (40nm, 28nm) The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...

1847 20.0

PCIe 3.0 PHY in UMC (28nm) The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

1848 20.0

PCIe 4.0 PHY in Samsung (14nm, 11nm, SF5A, SF2, SF2P) The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

1849 50.0

PCIe 4.0 PHY in TSMC (28nm, 16nm, 12nm, N7, N3P) The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

1850 50.0

PCIe 5.0 PHY in TSMC (16nm, 12nm, N7, N6, N5, N4P, N4C, N3E, N3P) The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s applicatio...