251 0.0

USB 2.0 PHY IP, Silicon Proven in UMC 40LP The USB2.0 PHY IP is a full physical layer (PHY) IP solution created for excellent performance and low power consumption. The High-Speed USB 2.0 trans...

252 0.0

USB 2.0 PHY IP, Silicon Proven in UMC 28HPC The USB 2.0 PHY IP Core offers a complete physical layer (PHY) solution for high performance and low power. It implements a High-Speed USB 2.0 transce...

253 0.0

USB 3.0 PHY IP, Silicon Proven in UMC 28HPC For peripheral devices, there is a Universal Serial Bus (USB) transceiver available. The USB 3.0 (USB SuperSpeed), USB 2.0 PIPE, and UTMI standards ar...

254 20.0

MIPI CSI-2 Receiver v1.1 Controller IP, Compatible with MIPI C-PHY & D-PHY The CSI-2 Receiver IP is in charge of handling CSI2 & SMIA protocols, as well as depacking input data to pixels. It also selects the correct destinati...

255 0.0

MIPI CSI-2 Receiver v1.3 Controller IP, Compatible with MIPI C-PHY & D-PHY The CSI-2 Receiver IP is in charge of handling CSI2 & SMIA protocols, as well as depacking input data to pixels. It also selects the correct destinati...

256 0.0

MIPI UFS v3.1 Host Controller IP, Compatible with M-PHY and Unipro Our Universal Flash Storage (UFS) Controller IP is compliant with the latest JEDEC UFS v3.1 specification. The UFS standard is a high performance, low...

257 0.0

MIPI Unipro v1.6 Controller IP, Compatible with M-PHY and UFS UniPro (Unified Protocol) is a layered protocol defined by the MIPI Alliance for connecting devices and components within a mobile device. UniPro allo...

258 2.5

SATA 3 HOST IP on ARRIA 10 FPGA The LDS-SATA3-HOST-A10GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a INTEL ARRIA 10 GX FPGA. The L...

259 0.0

MIPI DSI Transmitter v1.2 Controller IP, Compatible with MIPI D-PHY & C-PHY MIPI DSI transmitter IP is used to connect to up to two displays using the MIPI DSI-1 protocol. It supports video and command displays and can work in...

260 0.0

MIPI M-PHY v3.1 IP, Silicon Proven in UMC 40LP The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v3.0 Specification, UniPro v1.8 Specification, and Universal ...

261 0.0

MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 28 HPC+ The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specification, and Universal ...

262 0.0

MIPI M-PHY v4.1 IP, Silicon Proven in UMC 28 HPC The MIPI M-PHY Gear 4 IP is compatible with the most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specificatio...

263 80.0

MIPI D-PHY Rx IP, Silicon Proven in TSMC 22ULP The MIPI D-PHY Analog RX IP Core is fully compliant to the D-PHY specification version 1.2. It supports the MIPI Camera Serial Interface (CSI-2) and D...

264 0.0

MIPI D-PHY Rx IP, Silicon Proven in SMIC 55LL The D-PHY specification, version 1.2, is perfectly complied with by the MIPI D-PHY Analog RX IP Core. Supported protocols include the Display Serial I...

265 0.0

MIPI D-PHY Tx IP, Silicon Proven in SMIC 55LL The MIPI D-PHY Analog TX IP Core fully complies with version 1.2 of the D-PHY specification. It is compatible with the MIPI Camera Serial Interface (C...

266 0.0

HDMI 2.1 Tx PHY & Controller IP, Silicon Proven in TSMC 28HPC+ The HDMI V2.1 Tx complies with version 2.1 of the HDMI specification and offers a full single-link HDMI transmitter capability. It is made up of two m...

267 0.0

HDMI 2.1 Rx PHY & Controller IP, Silicon Proven in TSMC 28HPC+ The HDMI V2.1 Rx complies with version 2.1 of the HDMI specification and offers a full single-link HDMI receiver function. It is made up of two module...

268 0.0

HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP IP solutions for HDMI Transmitter (TX) devices are compliant with HDMI 2.0 and 1.4 specifications and offer the essential logic to create and validate...

269 2.5

SATA Host on Xilinx Zynq Artix 7 The LDS SATA 3 HOST XA7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Artix 7 speed grade 2 FPGA. The LDS SATA 3 H...

270 0.0

HDMI 2.0 Rx PHY & Controller IP, Silicon Proven in TSMC 28HPC+ This HDMI 2.O Rx IP complies with HDMI specification version 2.0b and offers a full HDMI receiver capability. It is made up of two modules: a link mod...

271 0.0

HDMI 2.0 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP The HDMI 2.O Rx IP complies with version 2.0b of the HDMI specification and offers the full functionality of an HDMI receiver. Physical layer (PHY) an...

272 0.0

HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 90/85G Physical layer IP core for HDMI transmitters that adheres to HDMI 1.4 requirements in full For consumer electronics like DVD player/recorders and camc...

273 0.0

HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 130/110G IP core for physical layer HDMI transmitters that fully complies with HDMI 1.4 specifications The HDMI transmitter PHY supports pixel clocks between 2...

274 0.0

HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...

275 0.0

HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC In addition to adhering to HDMI 2.0 and 1.4 specifications, IP solutions for HDMI Transmitter (TX) devices offer the essential logic required to creat...

276 0.0

HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 40SP IP core for physical layer HDMI transmitters that fully complies with HDMI 1.4 specifications The HDMI transmitter PHY provides an easy-to-implement s...

277 0.0

HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 65/55ULP IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...

278 0.0

HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in GF 65/55LPe IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...

279 0.0

HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in SMIC 65/55G IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...

280 2.5

Xilinx Ultra Scale Plus SATA HOST IP The LDS_SATA3_HOST_GTHE4 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Ultra Scale Plus GTHE4 FPGA. The LDS_SATA3_...

281 0.0

HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in SMIC 65/55SP IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...

282 0.0

HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in SMIC 40LL IP core for physical layer HDMI transmitters that fully complies with HDMI 1.4 specifications The HDMI transmitter PHY provides an easy-to-implement s...

283 0.0

HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in ST 28FDSOI IP core for physical layer HDMI transmitters that fully complies with HDMI 1.4 specifications The HDMI transmitter PHY provides an easy-to-implement s...

284 0.0

HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in GF 65/55LPe The HDMI receiver PHY (Physical layer), a single-port IP core, fully conforms with HDMI 1.4's requirements. This HDMI RX PHY supports TMDS rates betwe...

285 0.0

HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in SMIC 65/55SP The single-port IP core, HDMI receiver PHY (Physical layer), completely complies with HDMI 1.4's specifications. This HDMI RX PHY provides a straightf...

286 0.0

HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in ST 28FDSOI The HDMI receiver PHY (Physical layer), a single-port IP core, complies with all the specifications of HDMI 1.4. This HDMI RX PHY provides a straightf...

287 0.0

Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 28HPC+ The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2). built-in equalizer with programmable analogu...

288 0.0

Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2). built-in equalizer with programmable analogu...

289 0.0

Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 40SP Version 1.4 of the DisplayPort transmitter PHY is capable of transmitting data at rates of 1.62Gbps (RBR) to 5.4Gbps (HBR2). programmable analogue fea...

290 0.0

Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 40SP The Display Port 1.4 Rx IP Channel's maximum capacity is supported. Programmable analogue parameters including CDR Bandwidth, Equalizer Strength, Term...

291 0.3729

I2C Controller & PHY DTI I2C Controller provides the logic consistent with NXP I2C specification to support the communication of low-speed integrated circuits through I2C ...

292 0.0

Display Port 1.4 Rx PHY & Controller IP (Silicon Proven in IDM 180nm /150nm) Display port 1.4 Rx IP supports Channel bandwidth Up to 5.4bps per channel (HBR2), Programmable analog characteristics like CDR Bandwidth, Equalizer s...

293 0.0

V-by-One Rx IP, Silicon Proven in SMIC 40LL The V-by-One HS technology aims to transmit video signals at a high data rate using internal equipment connections. The requirements to create a trans...

294 50.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 22ULP The PHY combo comprises Serial ATA (SATA) compliant with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) compliant with PCIe ...

295 12.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 16FFC The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 2.0 Base Specification with support of PIPE interface sp...

296 0.0

V-by-One/LVDS Rx IP, Silicon Proven in GF 22FDX The V-by-One® HS technology aims to transmit video signals at a high data rate using internal equipment connections. The requirements to create a tran...

297 0.0

V-by-One/LVDS Tx IP, Silicon Proven in GF 22FDX Based on internal equipment connections, the V-by-One® HS technology aims to transmit video signals at high data rates. The requirements to build a tr...

298 0.0

12.5G Multiprotocol Serdes IP, Silicon Proven in SMIC 40LL The multi-protocol SerDes PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 2.0 Base Specification with support of P...

299 0.0

ISO 7816 based digital controller for integrated circuit card compliant with ETSI TS 102 221 and EMV 2000 standards Smart card controller core is compliant to ISO 7816 3 specification. The core is a technology independent, fully synchronous design. The controller fu...

300 0.0

I2C Bus Master / Slave Controller Interface with FIFO The I2C is a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmission between many device...