301 0.0

16G Multiproocol Serdes IP, Silicon Proven in TSMC 28HPC+ The multi protocol SerDes PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 4.0, 3.0, 2.0 Base Specification with su...

302 0.0

USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+ The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 3.0 Base Specification with support of PIPE interface sp...

303 0.3729

Dolphin I3C Controller & PHY DTI I3C Controller provides the logic consistent with NXP I3C specification to support the communication of low-speed integrated circuits through I3C ...

304 0.0

USB 3.1 Gen1 / Gen2 Host Controller IP USB 3.1 Host Controller is compliance with USB3.1 specification, Revision 1.0 and all associated ECN’s, USB specifications Rev 2.0 and all associated ...

305 0.0

USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SAM 8LPP The unified PHY complies with the USB, USB 3.0, Serial ATA, Peripheral Component Interconnect Express (PCIe), and USB 2.0 interface protocols (USB Hig...

306 0.118

MIPI Controller IP, CSI-2 Receiver, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP MIPI CSI Receiver Controller....

307 0.118

MIPI Controller IP, DSI Host, Soft IP DSI Host Controller....

308 0.118

MIPI Controller IP, DSI Peripheral, Soft IP MIPI DSI Peripheral Controller....

309 0.118

MIPI Controller IP, CSI-2 Transmitter, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP MIPI Transmitter Controller....

310 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process MIPI Receiver 80Mbps-1Gbps, UMC 40nm LP Low-K Logic process....

311 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process MIPI Receiver 80Mbps-1Gbps, Combo PHY for MIPI & HiSPi & LVDS & SubLVDS, UMC 40nm LP Low-K Logic process....

312 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process MIPI Receiver 80Mbps-1Gbps, Combo PHY for MIPI & HiSPi & LVDS & SubLVDS, UMC 40nm LP Low-K Logic process, Two Lane....

313 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1Gbps, UMC 40nm LP process MIPI Transmitter 80~1000MHz, UMC 40nm LP/RVT Low-K process....

314 0.3729

PCI/PCIX Interface 1.8V Oxide Device- TSMC 22nm 22ULP,ULL Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...

315 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1.5Gbps, UMC 55nm SP process MIPI Receiver 80~1500MHz, UMC 55nm SP/RVT Low-K Logic process....

316 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 55nm SP process MIPI Transmitter 80~1500MHz, UMC 55nm SP/RVT Low-K Logic process....

317 0.118

PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.13um HS/FSG process PCI-Express PHY with PIPE interface, 1 lane PCI-E PHY with Low Power feature, UMC 0.13um HS/FSG Logic process....

318 0.118

SATA III PHY IP, Gen-3, UMC 0.11um HS/FSG process 6G/3G/1.5G Serial ATA PHY, UMC 0.11um HS/FSG Logic process....

319 0.118

SATA III PHY IP, Gen-3, UMC 55nm SP process Serial ATA I, II, III PHY, UMC 55nm SP/RVT Low-K Logic process....

320 0.118

USB 1.1 PHY IP, UMC 0.13um LL/FSG process USB 1.1 transceiver, UMC 0.13um LL Logic/FSG process....

321 0.118

USB 2.0 Device PHY IP, Non-Crystal mode support, UMC 0.11um HS/AE process Crystal-Less USB2.0 PHY, UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process....

322 0.118

USB 1.1.OTG PHY IP, OTG, UMC 0.11um HS/AE process USB1.1 PHY feature USB 1.1 On-The-Go PHY, UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process....

323 0.118

USB 2.0 OTG PHY IP, UMC 55nm LP process USB2.0 OTG PHY (VDT and ID are included in PHY), UMC 55nm LP Low-K Logic process....

324 0.118

AXI system Peripheral IP, AXI Bus System Interconnect, Soft IP AXI bus interconnect....

325 0.3729

PCI/PCIX Interface 1.8V Oxide Device - TSMC 28nm 28HP, 28LP, 28ULP, 28HPL, 28HPC, 28HPC+, 28HPM Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...

326 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1.5Gbps, UMC 40nm LP process MIPI Receiver 80Mbps-1.5Gbps, UMC 40nm LP Low-K Logic process....

327 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process MIPI Transmitter 80Mbps~1500Mbps combo with CMOS input, UMC 40nm LP Low-K process....

328 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process MIPI Transmitter 80~1500MHz with 1-clock lane, 4-data lanes, UMC 40nm LP/RVT/LVT Low-K process....

329 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process MIPI Transmitter 80Mbps~1.5Gbps with 1-clock lane, 2-data lanes, UMC 40nm LP/RVT/LVT Low-K process....

330 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process MIPI Transmitter 80Mbps~1.5Gbps, UMC 40nm LP/RVT/LVT Low-K process....

331 0.118

SATA II PHY IP, UMC 55nm SP process Serial ATA I, II PHY, UMC 55nm SP/RVT Low-K Logic process....

332 0.118

USB 1.1 PHY IP, UMC 0.18um G2 process USB 1.1 PHY, UMC 0.18um GII Logic process 1.8/3.3V....

333 0.118

USB 1.1 PHY IP, UMC 0.18um G2 process USB 1.1 transceiver, UMC 0.18um GII Logic process....

334 0.118

USB 1.1.OTG PHY IP, HJTC 0.18um eFlash/G2 process HJTC 0.18um eFlash process, USB 1.1 OTG....

335 0.118

USB 1.1.OTG PHY IP, UMC 0.13um HS/FSG process 0.13um OTG PHY, UMC 0.13um HS/FSG process....

336 0.0

AXI Subsystem The AXI-SBS is an integrated, verified, AMBA® compliant hardware/software system ready for embedded applications using processors with AXI4 interfaces...

337 7.0

USB 2.0 Full/Low-Speed Device Core The FHG USB DEV is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate full-speed USB 2.0 device functionality wit...

338 0.118

USB 2.0 Device PHY IP, Non-Crystal mode support, HJTC 0.11um pFlash/LL process USB2.0 PHY, crystal-less, HJ 0.11um pflash LL process....

339 0.118

USB 2.0 Device PHY IP, Non-Crystal mode support, UMC 40nm LP process USB 2.0 PHY, crystal-less option, UMC 40nm LP/RVT process....

340 0.118

USB 2.0 Device PHY IP, UMC 0.13um LL/FSG process USB 2.0 PHY, UMC 0.13um LL Logic process....

341 0.118

USB 2.0 Device PHY IP, UMC 0.18um G2 process USB2.0 PHY (Pure device mode), UMC 0.18um GII Logic RVT/FSG process....

342 0.118

USB 2.0 Device PHY IP, UMC 0.18um G2 process USB2.0 Analog PHY, UMC 0.18um GII Logic RVT/FSG process....

343 0.118

USB 2.0 OTG PHY IP, UMC 0.13um HS/FSG process USB 2.0 On-The-Go PHY, UMC 0.13um HS/FSG Logic process....

344 0.118

USB 2.0 OTG PHY IP, UMC 0.18um G2 process USB 2.0 On-The-Go PHY, UMC 0.18um GII Logic RVT/FSG process....

345 0.118

USB 2.0 OTG PHY IP, UMC 0.25um process USB 2.0 host On-The-Go PHY, UMC 0.25um Logic process....

346 0.118

USB 2.0 OTG PHY IP, UMC 40nm LP process OTG USB2.0 UMC 40 nm LP/RVT process....

347 0.118

USB 2.0 OTG PHY IP, UMC 55nm eFlash process USB2.0 OTG PHY, UMC 55nm eFlash process....

348 7.0

USB 2.0 Full/Low-Speed Embedded Host Controller The FHG USB EHC is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate full-/low-speed USB 2.0 host functionality ...

349 0.118

USB 3.0 Device PHY IP, Non-Crystal mode support, UMC 40nm LP process Crystal-less USB 3.0 PHY, UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT process....

350 0.118

USB 3.0 OTG PHY IP, UMC 40nm LP process USB 3.0 PHY, UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT process....