Design & Reuse
435 IP
251
5.0
DiFi IP core
The DiFi IP core is a highly scalable and silicon agnostic implementation of the IEEE-ISTO Std 4900-2021: Digital IF Interoperability Standard v1.2.1 ...
252
30.0
LDPC Encoder / Decoder
Nand Flash write cycles are limited. An ECC detects and corrects failed operations, increasing the lifetime of the Nand Flash memory. For Nand Flash-b...
253
10.0
Automotive Ethernet (100BaseT1) Whitebox PHY IP with BroadR Reach
The Automotive Ethernet PHY IP Core is a 100M Ethernet PHY IP. Boasting a BroadR-Reach™ feature compatible with 100BaseT1 operations. It is a highly i...
254
38.0
1-112Gbps Integrated Laser Driver and Optical SerDes
OptiCORE includes all of the features of the AlphaCORE electrical SerDes (low-power high-speed ADC, sub-sampling clock multiplier (SSCM), powerful DSP...
255
4.0
Reed Solomon Decoder IP Core
A high performance, fully configurable Reed Solomon Decoder IP Core that is intended for use in a wide range of applications requiring forward error c...
256
4.0
Reed Solomon Encoder IP Core
A high performance, fully configurable Reed Solomon Encoder IP Core that is intended for use in a wide range of applications requiring forward error c...
257
1.0
GPON FEC 2.5 Gbps
This high performance core is a full featured Forward Error Correction encoder and decoder, specially designed for high speed optical networks or any ...
258
5.0
IEEE 802.1 Clause 4 MAC
The CT25208 Digital IP core is a standard Clause 4 CSMA/CD MAC exposing a proprietary, FIFO-like MAC Client interface (TX/RX). On the other end, th...
259
1.0
UDP/IP Hardware Protocol Stack
Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection. Designed for standalone o...
260
38.0
1.25G OTN Digital Wrapper
The OTU0/ODU0 Digital Wrapper IP Core offers 1.25G/s client transport rate over Optical Transport Network (OTN), specified by ITU-T G.709 recommendati...
261
0.0
Pulse Width Modulator
The PWM IP core implements a compact and highly flexible Pulse Width Modulator. The core generates a repeated pattern of pulse trains of run-time conf...
262
2.0
MAC Privacy Protection IP
The MAC Privacy Protection IP is a fully compliant solution that provides Ethernet Layer 2 Security for port and data privacy as standardized in IEEE ...
263
0.0
Centralized Network Configurator (CNC) for TSN nodes such as endpoints and Switches
Centralized Network Configurator or CNC is a component used in Time Sensitive Networking (TSN) networks. The CNC monitors data streams while coordinat...
264
0.118
10/100 Ethernet PHY IP, Energy Efficient, UMC 0.11um HS/AE process
10/100 Base-TX/FX Energy Efficient Ethernet PHY, UMC 0.11um HS/AE (AL Advance Enhancement) Logic process....
265
0.118
10/100 Ethernet PHY IP, UMC 65nm SP process
10/100 Base-TX Fast Ethernet PHY, UMC 65nm SP/RVT Low-K Logic process....
266
0.118
10BASE-Te/100BASE-TX/100BASE-FX/1000BASE-T Energy Efficient Ethernet PHY; UMC 28nm HPC+ process
10BASE-Te/100BASE-TX/100BASE-FX/1000BASE-T Energy Efficient Ethernet PHY; UMC 28nm HPC+ process...
267
3.0
DVB-S2 BCH and LDPC Encoder and Decoder
DVB-S2 (Digital Video Broadcast - Satellite 2nd Generation) is an ETSI standard of the second generation for digital data transmission via satellites....
268
0.0
MAC - DMAC - 10/100 Mb Media Access Controller
Our innovative solution is a hardware implementation of media access control protocol defined by the IEEE standard. DMAC in cooperation with external ...
269
3.0
MAC - DMAC-RMII - 10/100 Mb Media Access Controller with RMII
Our innovative solution is a hardware implementation of media access control protocol defined by the IEEE standard. The DMAC-RMII in cooperation with ...
270
0.118
Ethernet MAC IP, 10/100/1G Ethernet MAC, DMA (Direct Memory Access) function embedded, Soft IP
10/100/1000 Ethernet Controller with AHB bus....
271
38.0
2.5G OTN Digital Wrapper
The OTU1 Digital Wrapper IP Core offers 2.5G/s client transport rate over Optical Transport Network (OTN), specified by ITU-T G.709 recommendation. ...
272
0.118
Ethernet MAC IP, 10/100 Ethernet MAC, Soft IP
10/100 Ethernet MAC with MII or RMII (Reduced MII) interface....
273
9.0
10/100/1000 MBit Ethernet MAC
The GigaBit Ethernet Media Access Controller (GRETH_GBIT) supports 10/100/1000 MBit speed in both full- and half-duplex operation. The dataflow is han...
274
3.0
1Gbit/s LDPC Decoder and Encoder (WiMedia UWB)
The solution from Creonic for data rates of up to 1 Gbit/s offers outstanding efficiency in terms of implementation complexity. John Porter, CTO of Ca...
275
3.0
GMR Release 2 and GMR Release 3 LDPC Decoder
GEO-Mobile Radio (GMR) is an ETSI standard for satellite phones. The Creonic GMR Decoder IP core supports the PNB2 burst packets that were added in GM...
276
3.0
IEEE 802.15.3c (60 GHz PHY) Multi-Gbit/s LDPC Decoder
The IEEE 802.15 working group specifies standards targeting the wireless personal area network (WPAN). Task group 3 of the working group focuses on hi...
277
3.0
DVB-C2 Receiver (including LDPC and BCH decoder)
DVB-C2 (Digital Video Broadcast - Cable 2nd Generation) is an ETSI standard of the second generation for digital data transmission via cable networks....
278
2.0
DVB-RCS2 Turbo Decoder
DVB-RCS2 (Digital Video Broadcast - Second Generation DVB Interactive Satellite System) is the latest ETSI standard of the second generation for digit...
279
0.0
Fast Fourier Transform IP Core
The Creonic Fast Fourier Transform IP Core implements the Decimation in Frequency - Fast Fourier Transform based on the Cooley-Tukey algorithm. The FF...
280
0.0
CCSDS SCCC Modulator/ Turbo Encoder
...
281
0.0
WiMAX IEEE802.16e Transceiver IP Core
The transceiver is designed to be used together with an RF tuner and ADC/ DAC converters. The system has internal state machine to control the operat...
282
38.0
10G OTN Digital Wrapper
The OTU2/2e Digital Wrapper IP Core offers 10G/s client transport rate over Optical Transport Network (OTN), specified by ITU-T G.709 recommendation. ...
283
0.0
DVB-C2 LDPC/ BCH Decoder IP Core
In Digital video broadcasting for cable systems systems, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Density Parity Check) codes co...
284
0.0
Flash Memory LDPC Decoder IP Core
In the Sum Product Algorithm (SPA) for LDPC decoding the messages are sent from the check nodes to bit nodes after the SPA steps which are (for one it...
285
3.0
66/2112 Codec for Cyclic Code (2112,2080)
The CEC1-66/2112 core implements the codec for the Forward Error Correction (FEC) cyclic code (2112,2080) used in the IEEE 802.3ap (10G Backplane Ethe...
286
0.0
G.9960 LDPC Decoder
LDPC-G9660 core provides an efficient implementation of the low-density parity-check (LDPC) forward error correcting (FEC) encoding schemes used in th...
287
0.0
ECC - high-performance solution for elliptic curve cryptography
Our ECC IP Core represents a cutting-edge solution that brings the power of elliptic curve cryptography to your systems. Designed with versatility and...
288
0.0
ECDSA signature verification engine
In addition to its support for various elliptic curves, CryptOne’s prowess extends to the widely acclaimed Elliptic Curve Digital Signature Algorithm ...
289
0.0
ECDSA signature verification engine
In addition to its support for various elliptic curves, CryptOne’s prowess extends to the widely acclaimed Elliptic Curve Digital Signature Algorithm ...
290
0.0
ECDSA sign engine
Elliptic curves form the foundation of cutting-edge public-key cryptography, serving as a crucial component for secure digital signatures and robust k...
291
0.0
ECDSA sign engine
When safety & security meet the best size/performance ratio… ECDSA IP Core Elliptic curves form the foundation of cutting-edge public-key cryptogra...
292
3.0
High-Performance Lossless Compression Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from the compressed data. ...
293
38.0
40G OTN Digital Wrapper
The OTU3 Digital Wrapper IP Core offers 40G/s client transport rate over Optical Transport Network (OTN), specified by ITU-T G.709 recommendation. ...
294
20.0
BCH Encoder / Decoder
The IP-Maker BCH Encoder/Decoder is full featured, easy to use into FPGA and SoC designs. To be easily integrated with the system interface, the IP co...
295
1.0
High Throughput QAM Demapper
This is a high throughput QAM constellation demapper and Log Likelihood Ratio (LLR) bit-metric generator. The core is capable of accepting a new equa...
296
1.0
High Throughput Reed Solomon Decoder
This is a Reed Solomon decoder capable of operating with shortened codewords. The basic mother rate is (N,K) = (255,239) which has 16 parity bytes an...
297
1.0
Medium throughput, compact Reed Solomon decoder
This implementation of a M=8 Reed Solomon decoder has been designed to use a minimum set of resources whilst maintaining a medium throughput and flexi...
298
2.0
Reed-Solomon Memory Protection Codec
The Reed-Solomon IP core provide an alternative to traditional Hamming codecs for memory protection - Error Detection And Correction (EDAC) - function...
299
3.0
Open Source Viterbi Decoder (AXI4-Stream compliant)
Convolutional codes are widely adopted in wireless communication systems for forward error correction. Creonic offers you an open source Viterbi decod...
300
1.0
High-throughput Low-memory Viterbi Decoder
This IP core is available in either normal or high throughput configurations. The normal configuration instances a single fully parallel stage, equiva...