Design & Reuse
Catalog of SIP Cores
System on Chip design resources
425 IP
301
15.0
SONET/SDH OC-3 / OC-12 Transceiver/CDR PHY
Innovative architecture to meet the SDH/ Sonet Jitter Spec utilizing deep sub-micron single poly CMOS process Fully in compliance with ANSI, Bellcore...
302
20.0
USB 2.0 OTG On-The-Go Transceiver PHY
SMS USB 2.0 OTG Transceiver is LS/FS/HS compliant with USB 2.0 specification and includes VBUS comparators, Switched Pullup & Pulldown resistors, data...
303
6.0
10/100 Base-TX Fast Ethernet PHY; TSMC 55nm GP
...
304
8.0
10/100 Base-TX Fast Ethernet PHY; SMIC 40nm LL
SP-10_100_Ethernet-S40LL is a single-port DSP-based Fast Ethernet Transceiver. It contains all the active circuitry required to convert data stream to...
305
0.0
Low-Latency 10/100/1000 Ethernet MAC
The LLEMAC-1G implements an Ethernet Media Access Controller compatible with the 10/100 Mbps IEEE 802.3 and 1Gbps IEEE 802.3-2002 specifications. Feat...
306
100.0
112G Ethernet PHY in TSMC (N7, N6, N5, N3P)
The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
307
150.0
Configurable Ethernet controllers, compliant with the IEEE and consortium specifications for a range of applications
The pervasive nature of Ethernet has made it an integral part of our connected world, driving communication speeds up to 1.6T. To meet the quality, hi...
308
100.0
Synopsys 100G/200G/400G/800G Ethernet MAC IP
The Synopsys 100G/200G/400G/800G Ethernet MAC IP implements the full MAC layer and reconciliation sublayer compliant with the IEEE 802.3 specification...
309
100.0
800G Ethernet PCS IP
The Synopsys 800G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the 400G IEEE 802.3bs standard, provides a complete set of features enabl...
310
100.0
200G and 400G Ethernet PCS IP
The Synopsys Ethernet 400G and 200G Physical Coding Sublayer (PCS) IP is compliant with the IEEE 802.3bs standard and provides a complete set of featu...
311
100.0
The Synopsys 1.6T Ethernet MAC IP is based on IEEE 802.3-2018 spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications
The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...
312
100.0
1.6T Ethernet PCS IP based on the IEEE 802.3dj spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications
The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...
313
0.0
112G Ethernet PHY for TSMC N5
Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performan...
314
0.0
112G Ethernet PHY for VSR on TSMC N5
Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performan...
315
0.0
112G Ethernet PHY IP for TSMC N6
The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
316
100.0
1.6T Ultra Ethernet IP Solution with PHY, Controller and Verification IP
The Synopsys 1.6T Ultra Ethernet IP solution, consisting of 1.6T MAC and PCS multi-rate Ethernet controllers, silicon-proven 224G Ethernet PHY IP, and...
317
200.0
UALink IP Solution with PHY, Controller and Verification IP
The Synopsys UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Ac...
318
0.0
112G Ethernet PHY IP LR-Max for TSMC N4P
Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performan...
319
15.0
DVB-S2X Wideband LDPC BCH Encoder IP Core
The DVB-S2X Wideband LDPC BCH Encoder IP Core is developed for Digital Video Broadcasting applications....
320
0.0
10G Base T Ethernet PHY
Terminus Circuits presents a state-of-the-art Ethernet PHY IP, supporting 100 Mbps, 1 Gbps, and 10 Gbps data rates. Purpose-built for performance-driv...
321
10.0
oFEC Encoder and Decoder
OpenROADM oFEC (Open Forward Error Correction) is a core element of the OpenROADM initiative, providing a standardized, open-source FEC solution for h...
322
0.0
100 Gbit/s Polar Encoder and Decoder with soft-decision LLR input
The IPrium-100-Gbps-Polar-Encoder-Decoder IP Core implements Successive Cancellation Polar forward error correction algorithm with fully-parallel and ...
323
0.0
10G/40G RS(255,239) Encoder/Decoder for ITU G.709
The IPrium-10G-G.709-Codec IP Core implements the error-correcting coding Reed-Solomon (255, 239) for the ITU-T G.709 recommendation. Supports synchro...
324
0.0
10G I.3 BCH Encoder/Decoder for ITU G.975.1
The IPrium-10G-I.3-BCH-Codec IP core implements "Concatenated BCH super FEC" with BCH(3860, 3824) and BCH(2040, 1930) forward error correction algorit...
325
0.0
10G I.6 LDPC Encoder/Decoder for ITU G.975.1
The IPrium-10G-I.6-LDPC-Codec IP core implements the LDPC (32640, 30592) forward error correction algorithm for optical lines and is fully compatible ...
326
0.0
10G I.9 BCH Encoder/Decoder for ITU G.975.1
The IPrium-10G-I.9-BCH-Codec IP core implements "two interleaved extended BCH" super-FEC code for optical lines and is fully compatible with ITU-T G.9...
327
0.0
40G I.3 BCH Encoder/Decoder for ITU G.975.1
The IPrium-40G-I.3-BCH-Codec IP core implements "Concatenated BCH super FEC" with BCH(3860, 3824) and BCH(2040, 1930) forward error correction algorit...
328
0.0
40G I.6 LDPC Encoder/Decoder for ITU G.975.1
The IPrium-40G-I.6-LDPC-Codec IP core implements the LDPC (32640, 30592) forward error correction algorithm for optical lines and is fully compatible ...
329
0.0
4-channel ATSC 8VSB Modulator
The IPrium-ATSC-8VSB-Modulator IP Core implements the USA DTV standard ATSC A/53 Part 2. The IP Core contains Scrambler, RS Encoder, Trellis Encoder, ...
330
0.0
LDPC CCSDS (8160, 7136) Encoder and Decoder
The IPrium-CCSDS-LDPC-8160-7136-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm for CCSDS 131.0 ...
331
0.0
CCSDS 131.2 SCCC Turbo Encoder and 64-APSK Modulator
The IPrium-CCSDS-SCCC-Modulator-Encoder IP Core implements the CCSDS modulation standard 131.2-B. The IP Core is a complete digital QPSK, 8-PSK, 16-AP...
332
0.0
32-channel DVB-C Modulator
The IPrium-DVB-C-Modulator IP Core is 32-channel DVB-C Modualtor with MAX5861 (MAX5862) support....
333
0.0
32-channel 64-QAM/256-QAM J.83 Annex B Cable Modulator
The IPrium-J83B-C-Modulator IP Core is 32-channel J.83B Modualtor with MAX5861 (MAX5862) support....
334
0.0
CCSDS 231.0 LDPC(128, 64) and LDPC(512, 256) Encoder and Decoder
The IPrium-LDPC-CCSDS-231-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm for CCSDS 231.0-B-4 TC...
335
0.0
CCSDS AR4JA LDPC Encoder and Decoder with code rates 1/2, 2/3, 4/5 and block sizes 1K, 4K, 16K
The IPrium-LDPC-CCSDS-AR4JA-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm for AR4JA CCSDS 131....
336
0.0
Reed-Solomon Encoder/Decoder
The IPrium-RS-Codec IP Core implements Reed-Solomon forward error correction algorithm....
337
0.0
RS-QPSK Modem with low latency
The IPrium-RS-QPSK Modem IP Core is a complete BPSK/QPSK modem with integrated Reed-Solomon Forward Error Correction (FEC) and is optimized for extrem...
338
0.0
SOQPSK-TG LDPC Modulator for communication systems with non-linear amplifiers
The IPrium-SOQPSK-LDPC-Modulator IP Core implements constant amplitude CPM SOQPSK modulation with LDPC Coding. The IP Core is a complete digital SOQPS...
339
0.0
Viterbi Decoder
The IPrium-Viterbi-Decoder IP Core implements Viterbi decoding algorithm and supports trellis mode of operattion....
340
0.0
Ethernet 10/100 MAC (Exclusively for Turnkey ASIC design; not for standalone licensing)
The Ethernet controller is compliant with IEEE802.3 and it provides an interface between the host subsystem and the Media Independent Interface (MII)....
341
0.0
2.5G BaseT Ethernet PHY IP in TSMC 22ULL
The 2.5G BaseT Ethernet PHY IP Core provides a robust, production-proven physical layer solution for SoCs requiring high-speed, low-power Ethernet con...
342
0.0
2.5G BaseT Ethernet PHY IP in TSMC 28HPC+
The 2.5G BaseT Ethernet PHY IP built on the 28nm process delivers a cost-effective and performance-optimized physical layer solution for a broad spect...
343
0.0
10G Ethernet PHY IP In SAMSUNG 14LPP
The 10G Ethernet PHY IP Core, designed in 14nm FinFET technology, enables next-generation high-speed connectivity with full compliance to IEEE 802.3 E...
344
0.0
100M-1000M BaseT1 Ethernet PHY IP in TSMC 22ULL
The 100M/1000M Base-T1 Ethernet PHY IP Core provides single-pair Ethernet connectivity with full IEEE 802.3bw and 802.3bp compliance, enabling reliabl...
345
0.0
100M/1000M Base-T1 Ethernet PHY IP in TSMC 28HPC+
The 100M/1000M Base-T1 Ethernet PHY IP Core delivers single-pair Ethernet connectivity with full IEEE compliance in a 28nm process node. Supporting bo...
346
10.0
UALink PCS
The Chip Interfaces UA Link PCS IP Core is a high-performance, silicon-agnostic and fully compliant Physical Coding Sublayer (PCS) implementation of U...
347
8.5077
56G Ethernet PHY (8nm)
The Ethernet PHY IP consists of hardmacro PMA, PMD and softmacro PCS compliant to IEEE 802.3 Ethernet specification. This IP offers a cost-effective a...
348
0.0
1.6T Ethernet MAC Controller IP
The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...
349
0.0
Configuration-over-Ethernet (CoE) IP
SmartDV’s Configuration-over-Ethernet (CoE) IP enables remote device configuration and control over standard Ethernet networks, simplifying system des...
350
0.0
Ethernet 100G TSN MAC IP
SmartDV’s Ethernet 100G TSN (Time-Sensitive Networking) MAC IP Core is a specialized, high-performance solution that enables deterministic and low-lat...