351 12.0

USB 2.0 OTG On-The-Go Transceiver PHY SMS USB 2.0 OTG Transceiver is LS/FS/HS compliant with USB 2.0 specification and includes VBUS comparators, Switched Pullup & Pulldown resistors, data...

352 6.0

10/100 Base-TX Fast Ethernet PHY; TSMC 55nm GP ...

353 6.0

10/100 Base-TX Fast Ethernet PHY; SMIC 40nm LL SP-10_100_Ethernet-S40LL is a single-port DSP-based Fast Ethernet Transceiver. It contains all the active circuitry required to convert data stream to...

354 0.0

Low-Latency 10/100/1000 Ethernet MAC The LLEMAC-1G implements an Ethernet Media Access Controller compatible with the 10/100 Mbps IEEE 802.3 and 1Gbps IEEE 802.3-2002 specifications. Feat...

355 38.0

Sub-2.5G: GFP Mapper The Alphawave 2.5G and lower rate (aka Sub-2.5G) GFP-F IP block performs G.7041 GFP processing on packet data at rates up to 2.5G/s. Typical applicati...

356 100.0

112G Ethernet PHY in TSMC (N7, N6, N5, N3P) The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

357 150.0

Configurable Ethernet controllers, compliant with the IEEE and consortium specifications for a range of applications The pervasive nature of Ethernet has made it an integral part of our connected world, driving communication speeds up to 1.6T. To meet the quality, hi...

358 100.0

10G-100G MACsec Security Module for Ethernet The Synopsys 100G/200G/400G/800G Ethernet MAC IP implements the full MAC layer and reconciliation sublayer compliant with the IEEE 802.3 specification...

359 100.0

800G Ethernet PCS IP The Synopsys 800G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the 400G IEEE 802.3bs standard, provides a complete set of features enabl...

360 100.0

200G and 400G Ethernet PCS IP The Synopsys Ethernet 400G and 200G Physical Coding Sublayer (PCS) IP is compliant with the IEEE 802.3bs standard and provides a complete set of featu...

361 100.0

The Synopsys 1.6T Ethernet MAC IP is based on IEEE 802.3-2018 spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...

362 100.0

1.6T Ethernet PCS IP based on the IEEE 802.3dj spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...

363 0.0

112G Ethernet PHY for TSMC N5 Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performan...

364 0.0

112G Ethernet PHY for VSR on TSMC N5 Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performan...

365 0.0

112G Ethernet PHY IP for TSMC N6 The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

366 38.0

10G-800G Ethernet/FiberChannel/FlexO Core The 10G-800G Multi-channel Multi-rate Ethernet/FiberChannel/FlexO Core (OmegaCORE800G_ZX) Core from Alphawave is a multi-rate Ethernet aggregator tha...

367 100.0

1.6T Ultra Ethernet IP Solution with PHY, Controller and Verification IP The Synopsys 1.6T Ultra Ethernet IP solution, consisting of 1.6T MAC and PCS multi-rate Ethernet controllers, silicon-proven 224G Ethernet PHY IP, and...

368 200.0

UALink IP Solution with PHY, Controller and Verification IP The Synopsys UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Ac...

369 0.0

112G Ethernet PHY IP LR-Max for TSMC N4P Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performan...

370 15.0

DVB-S2X Wideband LDPC BCH Encoder IP Core The DVB-S2X Wideband LDPC BCH Encoder IP Core is developed for Digital Video Broadcasting applications....

371 0.0

10G Base T Ethernet PHY Terminus Circuits presents a state-of-the-art Ethernet PHY IP, supporting 100 Mbps, 1 Gbps, and 10 Gbps data rates. Purpose-built for performance-driv...

372 0.0

oFEC Encoder and Decoder OpenROADM oFEC (Open Forward Error Correction) is a core element of the OpenROADM initiative, providing a standardized, open-source FEC solution for h...

373 38.0

25GE/10GE/SGMII/1000BASE-X and MAC The fully integrated Physical Coding Sublayer (PCS), KR FEC (IEEE Clause 74 – fire code FEC), SGMII / 1000BASE-X and Media Access Controller (MAC) cor...

374 38.0

QSGMII/SGMII/1000BASE-X and MAC The fully integrated 5G QSGMII, 2.5G/1.25G SGMII and 1000BASE-X Physical Coding Sublayer (PCS-X) and Media Access Controller (MAC) core for Ethernet a...

375 38.0

25Gbps Ethernet and CPRI-10 FEC Layer IP Core The fully integrated PCS/FEC Layer core for 25Gbps Ethernet, FibreChannel 32GFC and CPRI-10 applications is complaint with IEEE 802.3by-2016 standard,...

376 38.0

1G-100G Ethernet/FiberChannel/FlexO Core The 1G-100G Multi-channel Multi-rate Ethernet/FiberChannel/FlexO Core (OmegaCORE100G_ZX) core from Alphawave is a multi-rate Ethernet aggregator that ...

377 38.0

10G-1.6T Ethernet/FiberChannel/FlexO Core The 10G-1.6T Multi-channel Multi-rate Ethernet/FiberChannel/FlexO Core (OmegaCORE1p6T_ZX) from Alphawave is a multi-rate Ethernet aggregator that sup...

378 38.0

2.5G/1000M/100M/10M Quad-Mode MAC The fully integrated 2.5G/1000M/100M/10M Quad-mode Media Access Controller (MAC) core for Ethernet applications is compliant with IEEE 802.3 standard ...

379 38.0

1-112Gbps Medium Reach (MR) and Very Short Reach (VSR) SerDes The AppolloCORE(MR/VSR) Multi-Standard-Serdes (MSS) IP is optimized for Medium Reach (MR) and Very Short Reach (VSR) applications. It is a highly conf...

380 38.0

800G Ethernet IP for AI Application The Alphawave IP OmegaCORE 800G_AX is a cutting-edge solution with the latency, power, and area highly optimized for artificial intelligence applicati...

381 2.5

Ethernet MAC 10G SFP The ETH_MAC_10G_SFP IP incorporates one Ethernet MAC at 10Gbits on a FPGA and is compliant with IEEE802.3ae specification. It is designed to be con...

382 0.3729

A bridge to convert the slave SPI interface to the master I2C interface and vice versa The dti_spi_to_i2c is a bridge to convert the slave SPI interface to the master I2C interface and vice versa....

383 0.3729

A bridge to convert the slave SPI interface to the master UART interface and vice versa The dti_spi_to_uart is a bridge to convert the slave SPI interface to the master UART interface and vice versa....

384 1.0

Gigabit Ethernet MAC with AVB The Arasan Gigabit Ethernet Media Access Controller IP is compliant with the Ethernet IEEE 802.3-2008 standard. In addition, the Gigabit Ethernet MAC...

385 5.0

HDLC - DHDLC - HDLC/SDLC controller The DHDLC IP core is used for controlling HDLC/SDLC transmission frame, designed to be used with 8-bit MCU, like DP8051/DP80390. It allows to save MCU...

386 5.0

DMESCC - Enhanced Multiprotocol Serial Communication Controller The DEMSCC – Dual channel Multiprotocol Enhanced Serial Communication Controller, is designed for use with 8- and 16- bit microprocessors. The DMESCC...

387 0.0

224G Ethernet PHY for TSMC 3nm The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

388 10.0

Gigabit Ethernet PHY Gigabit Ethernet PHY (in production)...

389 20.0

Gigabit Ethernet PHY Gigabit Ethernet PHY...

390 10.0

Gigabit Ethernet PHY (Modification Right) Gigabit Ethernet PHY Modification Right (in production)...

391 10.0

100G UDP/IP Hardware Protocol Stack Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection. Designed for standalone o...

392 10.0

10Base-T/100Base-TX Fast Ethernet PHY 10Base-T/100Base-TX Fast Ethernet PHY...

393 20.0

Gigabit Ethernet PHY Gigabit Ethernet PHY...

394 30.0

LTE turbo decoder TC7000-LTE is a convolutional turbo code (CTC) decoder optimized for FPGAs. Its unique pipe-line architecture enables to reach very high clock frequen...

395 1.0

High Performance Turbo Code TC1600 is ideally suited for applications requiring small to medium block sizes in order to reduce latency and offer a high physical layer flexibility...

396 1.0

Gigabit-range, low complexity LDPC decoder TC4902 is ideally suited for applications requiring a very efficient throughput/area ratio, while not sacrificing SNR performance. TC4902 implements a...

397 1.0

DVB-RCS2 turbo decoder TC1620 is a high performance turbo decdoer Core compliant with DVB-RCS2 specifications. Ideally suited fo systems requiring flexibility, short/medium ...

398 5.0

DVB-S2X FEC encoder The Core can reach payload bitrates up to 2.5 Gbits/s ( equivalent baud rates > 600Mbaud). The Core implements a very efficient parallel architecture ...

399 5.0

LTE Cat-0 turbo decoder TC1770 is a IoT-optimized turbo decoder Core compliant with LTE Cat-0 / Cat-M (release 12 and release 13). This Core incorporates LTE rate matching an...

400 1.0

Flexible LDPC encoder/decoder TC5100 is a highly flexible LDPC encoder/decoder Core. It can essentially cover all possible quasi-cyclic LDPC codes: WiFi, WiMAX, proprietary codes, ...