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701

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)...

702

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...

703

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)...

704

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...

705

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...

706

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...

707

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...

708

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...

709

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...

710

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)...

711

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)...

712

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)...

713

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)...

714

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 1.8V device RTC Core Library

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 1.8V device RTC Core Library...

715

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...

716

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C30)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C30)...

717

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)...

718

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)...

719

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...

720

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...

721

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...

722

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...

723

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...

724

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...

725

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...

726

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)...

727

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)...

728

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)...

729

0.118

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)

UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)...

730

0.118

UMC 28nm HPM process synchronous LVT preiphery high density single port SRAM memory compiler with Row and 2 Column Repair

UMC 28nm HPM process synchronous LVT preiphery high density single port SRAM memory compiler with Row and 2 Column Repair...

731

0.118

UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library

UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library...

732

0.118

UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track generic core cell library

UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track generic core cell library...

733

0.118

UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 HVT)

UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 HVT)...

734

0.118

UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 HVT)

UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 HVT)...

735

0.118

UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track Power Slash cell library

UMC 28nm HPM/HVT Logic and Mixed-Mode Process 7-track Power Slash cell library...

736

0.118

UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library

UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library...

737

0.118

UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library

UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library...

738

0.118

UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 LVT)

UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 LVT)...

739

0.118

UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 LVT)

UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 LVT)...

740

0.118

UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Power Slash cell library

UMC 28nm HPM/LVT Logic and Mixed-Mode Process 7-track Power Slash cell library...

741

0.118

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track generic cell library

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track generic cell library...

742

0.118

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track generic cell library

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track generic cell library...

743

0.118

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track powerslash_core library

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track powerslash_core library...

744

0.118

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track eco_m1 cell library

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track eco_m1 cell library...

745

0.118

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track generic core cell library

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track generic core cell library...

746

0.118

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 RVT)

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 RVT)...

747

0.118

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 RVT)

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 RVT)...

748

0.118

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Power Slash cell library

UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Power Slash cell library...

749

0.118

UMC 28nm Logic and Mixed-Mode HLP/RVT Process, 1.05V Analog ESD IO cell Library

UMC 28nm Logic and Mixed-Mode HLP/RVT Process, 1.05V Analog ESD IO cell Library...

750

0.118

UMC 28nm Logic and Mixed-Mode HLP/RVT Process, 1.8V Analog ESD IO cell Library

UMC 28nm Logic and Mixed-Mode HLP/RVT Process, 1.8V Analog ESD IO cell Library...

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