Design & Reuse
2087 IP
1851
0.0
PCIe Switch for USB4 Hubs, Hosts and Devices
Rambus PCIe Multi-port Switch for USB4 is a customizable, embedded Switch for PCI Express (PCIe) designed for implementations in USB4 devices. A fully...
1852
0.0
GCNano Ultra 3-MCU/MPU OpenGL ES 3.0 GPU for Wearables and IoT
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1853
0.0
GCNano-MCU/MPU OpenGL ES 2.0 GPU for Wearables and IoT
GCNano is a complete OpenGL ES 2.0 GPU architected for MCU / MPU systems with limited power, memory, and bandwidth configurations. The graphics core i...
1854
0.0
CCSDS 131.2 SCCC Turbo Encoder and 64-APSK Modulator
The IPrium-CCSDS-SCCC-Modulator-Encoder IP Core implements the CCSDS modulation standard 131.2-B. The IP Core is a complete digital QPSK, 8-PSK, 16-AP...
1855
0.0
CCSDS 231.0 LDPC(128, 64) and LDPC(512, 256) Encoder and Decoder
The IPrium-LDPC-CCSDS-231-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm for CCSDS 231.0-B-4 TC...
1856
0.0
CCSDS 8160/ 7136 Decoder and Encoder
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1857
0.0
CCSDS AR4JA LDPC Encoder and Decoder with code rates 1/2, 2/3, 4/5 and block sizes 1K, 4K, 16K
The IPrium-LDPC-CCSDS-AR4JA-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm for AR4JA CCSDS 131....
1858
0.0
Octal SPI Controller – XIP functionality (SINGLE, DUAL, QUAD and OCTAL SPI Bus Controller with Double Data Rate support) and DMA Support
Octal SPI master is full-featured, easy-to-use, synthesizable design, compatible with standard protocol of Macronix (MX66LM1G45G) Octal SPI REV.1.0 sp...
1859
0.0
2D Blit and Raster Graphics
The SEERIS Graphics Engine is a building block concept combining a collection of 2D graphics processing units with focus on blit operations, display c...
1860
0.0
3D GPU compatible with OpenGL ES (3D Graphics API) and OpenCL (Computing API)
DMP M3000 3D GPU IP Core adopts 3rd generation 3D graphics architecture Musashi and make remarkable progress in PPA (Power, Performance, Area) perform...
1861
0.0
HD video and vision integrated platform solution
The videantis v-MP4120HDX is a unified video & vision platform integrating both 720p HD multi-standard video codecs and embedded vision acceleration o...
1862
0.0
LDPC CCSDS (8160, 7136) Encoder and Decoder
The IPrium-CCSDS-LDPC-8160-7136-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm for CCSDS 131.0 ...
1863
0.0
DDR Memory Controller IP for low power and high reliability
DDR interface provides full support for the DDR interface, compatible with JESD79F specification and DFI-version 2.0 or higher Specification Compliant...
1864
0.0
DDR5 PHY&MAC - high performance and low power
With sophisticated architecture and advanced technology, KNiulink provide DDR5 with high performance and low power. In advanced process nodes, KNiuli...
1865
0.0
Near-threshold voltage and ultra-wide dynamic voltage and frequency scaling (UW-DVFS)
Minima Processor's ultra-low power technology deploys patented Minima Dynamic Margining to minimize energy consumption of any digital logic. The M...
1866
0.0
Reed Solomon Decoder and Encoder FEC IP Core
The Reed Solomon Encoder is fed with an input message of K information symbols, the Encoder appends 2T parity symbols to the input message in order to...
1867
0.0
IEEE 802.11n/ac/ax Encoder and Decoder
The IPrium-LDPC-802.11-WIFI-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm for IEEE 802.11n/ac/...
1868
0.0
Register File with low power retention mode and 3 speed options
Low Leakage. Mobile Semiconductor's RF1P-ULL-GF22FDX-PLUS memory compiler generates single-port Register File instances using the GLOBALFOUNDRIES 22nm...
1869
0.0
Register File with low power retention mode and 3 speed options
Low Leakage. Mobile Semiconductor's SP-ULD-GF22FDX-PLUS memory compiler generates single-port Register File instances using the GLOBALFOUNDRIES 22nm F...
1870
0.0
Register, Configuration and Control Bus
A2R provides an interconnection mechanism between control registers in an ASIC design and any number of control devices; CPUs, debug ports etc.. The b...
1871
0.0
Behavioral E3 Generator and Analyzer
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1872
0.0
Behavioral E3 over SONET Generator and Analyzer
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1873
0.0
Tensix RISC-V-based AI IP For Enhanced Training And Inference
Tenstorrent develops AI IP with precision, anchored in RISC-V’s open architecture, delivering specialized, silicon-proven solutions for both AI traini...
1874
0.0
Centralized Network Configurator (CNC) for TSN nodes such as endpoints and Switches
Centralized Network Configurator or CNC is a component used in Time Sensitive Networking (TSN) networks. The CNC monitors data streams while coordinat...
1875
0.0
Serial Peripheral Interface – Master/Slave with Octal, Quad, Dual and Single SPI Bus support
The SPI IP is a revolutionary octal SPI designed to offer the fastest operations available for any serial SPI memory. It is flexible enough to interfa...
1876
0.0
Zero-cross detector and valley OCP block, trimmable
Zero-cross detector and valley OCP block, trimmable...
1877
0.0
Perspective Transformation and Lens Correction Image Processor
The logiVIEW Perspective Transformation and Lens Correction Image Processor IP core for video and imaging applications using single or multiple camera...
1878
0.0
Certified ASIL B & ISO 21434 Cybersecurity Compliant PCIe 5.0 Integrity and Data Encryption Security Module
PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...
1879
0.0
Very-low-noise and programmable very-high-gain DC-voltage amplifier with precision offset trimming
The TS_VA_LNDC_X8 comprises the main function dcamp and its companion dcamptrim. The dcamp is a very-low-output-noise-level (604μVRMS max) and 1%-prec...
1880
0.0
AES-GCM MACsec (IEEE 802.1AE) and FC-SP Cores
Implementation of the new LAN security standard 802.1ae (MACSec) requires the NIST standard AES cipher in the GCM mode for encryption and message auth...
1881
0.0
JESD204B Transmitter and Receiver
Logic fruit Technologies has designed JESD204B RTL IP. It can support increased lane rates upto 12.5Gbps for higher bandwidth applications. It can be ...
1882
0.0
JESD204C Transmitter and Receiver
Logic fruit Technologies has designed JESD204C RTL IP to support increased lane rates upto 32Gbps for higher bandwidth applications. This IP can be co...
1883
0.0
Retention Alternative Regulator, combines a linear regulator and an ultra-low quiescent regulator for sleep mode in TSMC 40uLPeF
RAR-iLR-qLR-ref-1.62-3.63-0.55-2.5.01_TSMC_40_uLPeF is a Retention Alternating Regulator in TSMC 40uLPeF combining two regulation sub-components: a li...
1884
0.0
Retention Alternative Regulator, combines a linear regulator and an ultra-low quiescent regulator for sleep mode in TSMC 55uLPeF
RAR-iLR-qLR-ref-1.62-3.63-0.55-2.5.01_TSMC_55_uLPeF is a Retention Alternating Regulator in TSMC 55uLPeF combining two regulation sub-components: a li...
1885
0.0
Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode in TSMC 40uLP
RAR-eSR-qLR-ref-1.62-3.63-0.55-2.5.04g_TSMC_40_uLP is a Retention Alternating Regulator in TSMC 40uLP embedding and controling two ViC regulators call...
1886
0.0
Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode in TSMC 55uLP
RAR-eSR-qLR-1.62-3.63-0.55-2.5.01_TSMC_55_uLP is a Retention Alternating Regulator in TSMC 55uLP embedding two regulation sub-components: a switching ...
1887
0.0
Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode in TSMC 55uLPeF
RAR-eSR-qLR-ref-1.62-3.63-0.55-2.5.02_TSMC_55_uLPeF is a Retention Alternating Regulator in TSMC 55uLPeF embedding two regulation sub-components: a sw...
1888
0.0
Tetrivis - Analogue, Mixed-Signal and RF Subsystem Design Services and Consulting
Tetrivis provides design services of virtually any analogue and mixed-signal subsystem from DC to 15GHz in Bipolar, BiCMOS and CMOS process technologi...
1889
0.0
HEVC 4Kp60 Decoder, Supports 4:2:2, 10-bit decoding and 150Mbps bitrate
VYUsync’s HEVC 4Kp60, 4:2:2, 10-bit Decoder Core is a highly optimized universal video decompression engine. The Decoder has been tested with more tha...
1890
0.0
New Wave DV - Independent Verification and Hardware Design
Hardware Design New Wave DV has successfully developed a variety of network processing and algorithmic designs. We provide a variety of off-the-shelf...
1891
0.0
Nexus: A Lightweight and Scalable Multi-Agent Framework for Complex Tasks Automation
Recent advancements in Large Language Models (LLMs) have substantially evolved Multi-Agent Systems (MASs) capabilities, enabling systems that not only...
1892
0.0
RF SP3T Switch used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation
RFSW02C RF SP3T Switch is used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation....
1893
0.0
RF SPDT Switch from 10-30 GHz used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation
RFSW01C RF SPDT Switch is used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation....
1894
0.0
RF SPDT Switch from 2-44 GHz used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation
RFSW03C RF SPDT Switch is used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation....
1895
0.0
RF SPDT Switch from 20-40 GHz used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation
RFSW05C RF SPDT Switch is used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation....
1896
0.0
RF SPDT Switch from 20-40 GHz used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation
RFSW04C RF SPDT Switch is used in TDD (Time Division Duplexing) mode for switching between TX and RX path with low loss, broadband and high isolation....
1897
0.0
oFEC Encoder and Decoder
OpenROADM oFEC (Open Forward Error Correction) is a core element of the OpenROADM initiative, providing a standardized, open-source FEC solution for h...
1898
0.0
EFR32 Mighty Gecko Mesh Networking Wireless SoCs for zigbee and Thread
The Mighty Gecko family of SoCs is ideal for designing energy-friendly wireless connected IoT devices. Part of the Wireless Gecko portfolio, the Might...
1899
0.0
1G/10G/25G/50G/100G Ethernet Switch IP Core - Efficient and Massively Customizable
Packet Architects offers a series of high speed switching IP cores, developed using the unique FlexSwitch toolchain. This toolchain provides a fast an...
1900
0.0
IGALVDT14A, TSMC CLN28HPC+ LVDS RX and CMOS Combo I/O
IGALVDT14A contains a receiver (RX) for LVDS interface and bi-derectional double CMOS. It supports the data rate up to 500Mbps. There is one macro ins...