Design & Reuse
Catalog of SIP Cores
System on Chip design resources
694 IP
651
0.0
sROMet compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
Foundry sponsored - sROMet compiler - TSMC 55 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler ra...
652
0.0
CrossLink-NX - Embedded Vision and Processing FPGA
Built on the Lattice Nexus Platform - Up to 75% lower power vs similar FPGAs and small form factor packaging with sizes as small as 4 mm x 4 mm.Provid...
653
0.0
USB1.1 PHY in SMIC 55PFULP
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
654
0.0
USB2.0 OTG IP
This IP is developed as the USB2.0 OTG PHY. This PHY consists of an analog PHY and a PCS layer. The PCS section includes basic encoding and decoding a...
655
0.0
USB2.0 OTG PHY in SMIC 0.11G
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
656
0.0
USB2.0 OTG PHY in SMIC 0.13EF
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
657
0.0
USB2.0 OTG PHY in SMIC 0.13G
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
658
0.0
USB2.0 OTG PHY in SMIC 28HKC+
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
659
0.0
USB2.0 OTG PHY in SMIC 28HKD 0.9/1.8V
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
660
0.0
USB2.0 OTG PHY in SMIC 28HKD 0.9/2.5V
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
661
0.0
USB2.0 OTG PHY in SMIC 40NEF
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
662
0.0
USB2.0 OTG PHY in SMIC 40NLL
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
663
0.0
USB2.0 OTG PHY in SMIC 55EF
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
664
0.0
USB2.0 OTG PHY in SMIC 55NLL
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
665
0.0
DSC decoder IP
DSC decoder IP is compliant with standard VESA Display Stream Compression version 1.1/1.2/1.2a....
666
0.0
TSMC12nm Integer-N PLL, 800M-3.2G
This present IP is a charge-pump Phase Locked Loop (PLL) circuit, which can cover 800MHz-3200MHz vco output frequency. It consists blocks of M divider...
667
0.0
DSP-Based 56G PAM4 SerDes PHY IP
ForestSemi builds high-performance connectivity IP for the next generation of AI, HPC and data-center systems. With deep SerDes, PHY, and semiconducto...
668
0.0
PSRAM/SD3.0/EMMC5.1 IO in SMIC 28HKD 0.9/2.5V, upto 600Mbps
...
669
0.0
Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
Mobile Semiconductor's RF1P-ULL-GF22FDX-PLUS memory compiler generates Dual Port Register File instances using the GLOBALFOUNDRIES 22nm FDX-PLUS CMOS...
670
0.0
Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
Low Leakage. Mobile Semiconductor's RF1P-ULL-GF22FDX-PLUS memory compiler generates Dual Port Register File instances using the GLOBALFOUNDRIES 22nm F...
671
0.0
Dual Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 80 k
Foundry sponsored - Dual Port SRAM compiler - TSMC 90 nm LPeF - Memory otimized for high density and low power - compiler range up to 80 k...
672
0.0
XuanTie C908
XuanTie C908 is the latest RISC-V processor of the XuanTie series launched by T-Head Semiconductor. It has adopted the RV64GCB[V] instruction and is c...
673
0.0
Audio Codec in SMIC 55NLl
...
674
0.0
Audio-Grade DC/DC Buck Converter
DCDC-ADG-1.62-5.5-0.5-3.3-A01-G22FDX_GF_22_FDXPlus is an Audio Grade DC/DC Buck Converter in GF 22FDXPlus aimed at supplying battery-powered audio IPs...
675
0.0
Bulk 40ULP single port SRAM Compiler - ultra low power, low power retention mode
Silicon proven, qualified and in high volume production. Single Port compiler offers the lowest retention power on the market....
676
0.0
Bulk 40ULP Single Port SRAM with low power retention mode, high speed pins on 1 side
Low Leakage. Mobile Semiconductor's Bulk 40 ULP BULKSRAM memory compiler generates memory instances using the premier low power 40nm process.. Each ul...
677
0.0
Nutcracker XSR Connectivity Chiplet
Core and analog logic may not always deploy at the same time in the same process. Maturing high performance analog typically takes longer in moving to...
678
0.0
Automated Generation of Automotive Grade PMU (PowerStudio & Maestro)
PowerStudio & Maestro is unique solution for the automated generation of automotive-grade Power Management Units (PMU): - Maestro is a configurable p...
679
0.0
Output 1.2/1.8V, 10mA LDO in SMIC 55ULP
...
680
0.0
Output0.9-1.2V, 50mA DCDC voltage converter in SMIC 55ULP
...
681
0.0
Output1.1V, 50mA LDO in GF 40NLL
...
682
0.0
Output1.2V, 100uA LDO in SMIC 55NLL
...
683
0.0
Output1.5V, 50mA DCDC voltage converter in SMIC 55ULP
...
684
0.0
LVDS IO in SMIC 28HKC+, upto 1.6Gbps
LVDS IO can be applied for various die-to-die interface communication. Brite LVDS IO libraries can support data rate up to 2000Mbps with 2.5V and 1.8V...
685
0.0
LVDS IO in SMIC 40NLL, upto 800Mbps
LVDS IO can be applied for various die-to-die interface communication. Brite LVDS IO libraries can support data rate up to 2000Mbps with 2.5V and 1.8V...
686
0.0
Over-Voltage Protection Module
OPM-G2-22FDX-[1.62-5.5]-[1.8].01_GF_22_FDX is an Over-voltage Protection Module in GF 22FDX enabling direct connection of voltage regulators to 5.5 V ...
687
0.0
Over-Voltage Protection Module
OPM-G2-22FDX-[1.62-5.5]-[1.8].02_GF_22_FDXPlus is an Over-voltage Protection Module in GF 22FDXPlus enabling direct connection of voltage regulators t...
688
0.0
Over-Voltage Protection Module
OPM-VR-LS-1.62-5.5-1.8-A01-D1.8-T22ULL_TSMC_22_ULL1.8 is an Over-voltage Protection Module in TSMC 22ULL enabling direct connection of voltage regulat...
689
0.0
Over-Voltage Protection Module
OPM-G2-22FDX-[1.62-5.5]-[1.8].03_GF_22_FDXPlus is an Over-voltage Protection Module in GF 22FDXPlus enabling direct connection of voltage regulators t...
690
0.0
Over-Voltage Protection Module
OPM-G2-22FDX-[1.62-5.5]-[1.8].03_GF_22_FDX is an Over-voltage Protection Module in GF 22FDX enabling direct connection of voltage regulators to 5.5 V ...
691
0.0
Over-Voltage Protection Module
OPM-G2-1.9-5.5-1.8.02_GF_22_FDX is an Over-voltage Protection Module for regualtors in GF 22FDX that handles direct connection of voltage regulators t...
692
0.0
Over-Voltage Protection Module
OPM-G2-1.9-5.5-1.8.03_GF_22_FDX is an Over-voltage Protection Module in GF 22FDX that handles direct connection of voltage regulators to a 5V battery ...
693
0.0
Two port register file (1R1W) with low power retention mode
Low Leakage. Mobile Semiconductor's Bulk 22 ULL Register file memory compiler generates dual port Register File instances using the Bulk 22ULL proces...
694
0.0
Two Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
Foundry sponsored - Two Port Register File compiler - TSMC 55 nm uLP - Memory optimized for high density and low power - Dual Voltage - compiler range...