2201 1.0

TSMC CLN90GOD 90nm Clock Generator PLL - 220MHz-1100MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2202 1.0

TSMC CLN90GOD 90nm Clock Generator PLL - 440MHz-2200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2203 1.0

TSMC CLN90GOD 90nm DDR DLL - 129MHz-645MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2204 1.0

TSMC CLN90GOD 90nm DDR DLL - 172MHz-860MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2205 1.0

TSMC CLN90GOD 90nm DDR DLL - 272MHz-1360MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2206 1.0

TSMC CLN90GOD 90nm Deskew PLL - 110MHz-550MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2207 1.0

TSMC CLN90GOD 90nm Deskew PLL - 220MHz-1100MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2208 1.0

TSMC CLN90GOD 90nm Deskew PLL - 440MHz-2200MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2209 1.0

TSMC CLN90GOD 90nm General Purpose PLL - 220MHz-1100MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2210 1.0

TSMC CLN90GOD 90nm Spread Spectrum PLL - 110MHz-550MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2211 1.0

TSMC CLN90GOD 90nm Spread Spectrum PLL - 220MHz-1100MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2212 1.0

TSMC CLN90GOD 90nm Spread Spectrum PLL - 440MHz-2200MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2213 1.0

TSMC CLN90GT 90nm Clock Generator PLL - 125MHz-625MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2214 1.0

TSMC CLN90GT 90nm Clock Generator PLL - 250MHz-1250MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2215 1.0

TSMC CLN90GT 90nm Clock Generator PLL - 500MHz-2500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2216 1.0

TSMC CLN90GT 90nm DDR DLL - 159MHz-795MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2217 1.0

TSMC CLN90GT 90nm DDR DLL - 212MHz-1060MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2218 1.0

TSMC CLN90GT 90nm DDR DLL - 335MHz-1675MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2219 1.0

TSMC CLN90GT 90nm Deskew PLL - 125MHz-625MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2220 1.0

TSMC CLN90GT 90nm Deskew PLL - 250MHz-1250MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2221 1.0

TSMC CLN90GT 90nm Deskew PLL - 500MHz-2500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2222 1.0

TSMC CLN90GT 90nm General Purpose PLL - 250MHz-1250MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2223 1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 125MHz-625MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2224 1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 250MHz-1250MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2225 1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 500MHz-2500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2226 1.0

TSMC CLN90LP 90nm Clock Generator PLL - 120MHz-600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2227 1.0

TSMC CLN90LP 90nm Clock Generator PLL - 240MHz-1200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2228 1.0

TSMC CLN90LP 90nm Clock Generator PLL - 60MHz-300MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2229 1.0

TSMC CLN90LP 90nm DDR DLL - 104MHz-520MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2230 1.0

TSMC CLN90LP 90nm DDR DLL - 164MHz-820MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2231 1.0

TSMC CLN90LP 90nm DDR DLL - 78MHz-390MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2232 1.0

TSMC CLN90LP 90nm Deskew PLL - 120MHz-600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2233 1.0

TSMC CLN90LP 90nm Deskew PLL - 240MHz-1200MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2234 1.0

TSMC CLN90LP 90nm Deskew PLL - 60MHz-300MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2235 1.0

TSMC CLN90LP 90nm General Purpose PLL - 120MHz-600MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2236 1.0

TSMC CLN90LP 90nm Spread Spectrum PLL - 120MHz-600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2237 1.0

TSMC CLN90LP 90nm Spread Spectrum PLL - 240MHz-1200MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2238 1.0

TSMC CLN90LP 90nm Spread Spectrum PLL - 60MHz-300MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2239 1.0

Stereo PCM to PWM Converter, SMIC 0.18um The AR35S18E is a digitally coded conversion IP that translates stereo 16-24bit pulse-code modulated (PCM) input data into pulse-width modulated (PWM)...

2240 1.0

RTP / UDP / IP Hardware Stack for H.264/H.265 NAL Video Streams Packet Processing The Digital Blocks DB-RTP-UDP-IP-NAL IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor...

2241 1.0

RTP / UDP / IP Hardware Stack for Raw, Uncompressed RGB/YUV Video Streams The Digital Blocks DB-RTP-UDP-IP-AV IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor ...

2242 1.0

Buffer Amplifier operating from 10-45 GHz and can be used in wide band application or to drive the high power amplifier RFBA02C Buffer Amplifier operates from 10-45 GHz and can be used in wide band application or to drive the high power amplifier. The amplifier provides...

2243 1.0

Buffer Amplifier operating from 25-62.5 GHz and can be used in Ka / V band application or to drive the high power amplifier. RFBA01C Buffer Amplifier operates from 25-62.5 GHz and can be used in Ka / V band application or to drive the high power amplifier. The amplifier prov...

2244 1.0

Super-Fast 8051 Microcontroller Core with Configurable Features and Peripherals The S8051XC3 IP core implements a high-performance, low-energy, 8-bit microcontroller that executes the MCS®51 instruction set and includes a configur...

2245 1.0

Super-Speed Plus USB 3.2 Hub Controller USB3.2 SuperSpeed Hub The Super Speed Plus USB bus is implemented as a separate dual-simplex dual lane data path consisting of two uni-directional di...

2246 1.0

1Watts, 2.1-2.8GHz Power Amplifier ...

2247 1.0

Switch with 0/20dB Attenuator ...

2248 0.0

4-/8-bit mixed-precision NPU IP OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

2249 0.0

8-bit Microprocessor The iniCPU is a software compatible 6809 microprocessor implemented in VHDL using a stuctured and synchronous design methodology....

2250 0.0

8-stage, dual-issue, highly efficient in-order pipeline compatible with the RISC-V RV64GCV ISA The SiFive Performance P270 is an 8-stage, dual-issue, highly efficient in-order pipeline compatible with the RISC-V RV64GCV ISA. With full support fo...