Analog Bits Inc. IP Cores

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2601

1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 250MHz-1250MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2602

1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 500MHz-2500MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2603

1.0

TSMC CLN90LP 90nm Clock Generator PLL - 120MHz-600MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2604

1.0

TSMC CLN90LP 90nm Clock Generator PLL - 240MHz-1200MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2605

1.0

TSMC CLN90LP 90nm Clock Generator PLL - 60MHz-300MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2606

1.0

TSMC CLN90LP 90nm DDR DLL - 104MHz-520MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2607

1.0

TSMC CLN90LP 90nm DDR DLL - 164MHz-820MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2608

1.0

TSMC CLN90LP 90nm DDR DLL - 78MHz-390MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2609

1.0

TSMC CLN90LP 90nm Deskew PLL - 120MHz-600MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2610

1.0

TSMC CLN90LP 90nm Deskew PLL - 240MHz-1200MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2611

1.0

TSMC CLN90LP 90nm Deskew PLL - 60MHz-300MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2612

1.0

TSMC CLN90LP 90nm General Purpose PLL - 120MHz-600MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2613

1.0

TSMC CLN90LP 90nm Spread Spectrum PLL - 120MHz-600MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2614

1.0

TSMC CLN90LP 90nm Spread Spectrum PLL - 240MHz-1200MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2615

1.0

TSMC CLN90LP 90nm Spread Spectrum PLL - 60MHz-300MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2616

1.0

Stereo PCM to PWM Converter, SMIC 0.18um

The AR35S18E is a digitally coded conversion IP that translates stereo 16-24bit pulse-code modulated (PCM) input data into pulse-width modulated (PWM)...

2617

1.0

RTP / UDP / IP Hardware Stack for H.264/H.265 NAL Video Streams Packet Processing

The Digital Blocks DB-RTP-UDP-IP-NAL IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor...

2618

1.0

RTP / UDP / IP Hardware Stack for Raw, Uncompressed RGB/YUV Video Streams

The Digital Blocks DB-RTP-UDP-IP-AV IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor ...

2619

1.0

Super-Fast 8051 Microcontroller Core with Configurable Features and Peripherals

The S8051XC3 IP core implements a high-performance, low-energy, 8-bit microcontroller that executes the MCS®51 instruction set and includes a configur...

2620

1.0

Super-Speed Plus USB 3.2 Hub Controller

USB3.2 SuperSpeed Hub The Super Speed Plus USB bus is implemented as a separate dual-simplex dual lane data path consisting of two uni-directional di...

2621

0.3729

A bridge to convert the slave SPI interface to the master I2C interface and vice versa

The dti_spi_to_i2c is a bridge to convert the slave SPI interface to the master I2C interface and vice versa....

2622

0.3729

A bridge to convert the slave SPI interface to the master UART interface and vice versa

The dti_spi_to_uart is a bridge to convert the slave SPI interface to the master UART interface and vice versa....

2623

0.3729

A memory BIST solution which has been optimized for Dolphin memories

Dolphin Technology now provides a memory BIST solution which has been optimized for Dolphin memories. It supports all Dolphin memory compilers, includ...

2624

0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process G/LV

Memory Compilers...

2625

0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process GC

Memory Compilers...

2626

0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF

Memory Compilers...

2627

0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF

Memory Compilers...

2628

0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF+GL/FF+LL/FFC

Memory Compilers...

2629

0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/FF+

Memory Compilers...

2630

0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P

Memory Compilers...

2631

0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P

Memory Compilers...

2632

0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FFC/FFC+

Memory Compilers...

2633

0.3729

1.2V Temperarure sensor (0.5 degree C accuracy) - TSMC 5nm 5FF