Design & Reuse
5554 IP
501
0.0
FortifyIQ's Secure Hybrid Crypto Box IP Core with Classical and Post-Quantum Cryptography for Embedded Systems (AES, HMAC-SHA2, ECC/RSA etc., PQC) (SCA,DPA,FIA secure)
FortifyIQ’s Hybrid Crypto Box IP core is a comprehensive, high-efficiency cryptographic solution that combines RSA, ECC, AES, and SHA-2/HMAC with a bu...
502
0.0
LPDDR4X/4/3/DDR4 PHY for TSMC 12nm and 16nm
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and ext...
503
0.0
LPDDR5/4X PHY IP for TSMC N7
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
504
0.0
LPDDR5/5X Memory PHY for TSMC N3P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
505
0.0
LPDDR5/5X Memory PHY for TSMC N4P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
506
0.0
LPDDR5/5X Memory PHY for TSMC N5P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
507
0.0
USB 2.0 PHY for Samsung 7LPP
Proven PHY IP for USB Device, Host, and OTG with small footprint and low active power The ubiquity of USB 2.0 in devices makes it nearly mandatory fo...
508
0.0
USB 3.x PHY for TSMC
Proven PHY IP for USB Device, Host, and DRD with small footprint and low active power The ubiquity of USB 3.x in devices makes it nearly mandatory fo...
509
0.0
LTE Category M1 / NB1 (NB-IoT) RF Transceiver
Orca's digital ultra-low power ORC3010 LTE Category M1 / NB1 (NB-IoT) transceiver is designed and optimized for the smallest, lowest-power IoT and...
510
0.0
eUSB2V2 PHY
Low voltage USB 2.0 supporting 4.8Gbps eUSB2V2 is primarily a performance enhancement to eUSB2 native mode to provide more bandwidth for peripherals,...
511
44.0
FlexNoC 5 Option For Scalability and Performance Critical Systems
Arteris IP FlexNoC Performance Option accelerates development of next-generation deep neural network (DNN) and machine learning systems. Automate and ...
512
7.0
10 Bit 40 MS/s Pipeline ADC
The IP consists of a 10 bit 40 MS/s pipeline ADC. A time-interleaved architecture with 1.5 bit per stage is used. The operational amplifiers are share...
513
7.0
12 Bit 17 kS/s Cyclic ADC
This cyclic ADC, based on redundant-signed-digit (RSD) conversion, is optimized for power efficiency and high accuracy. It provides 12 bit resolution ...
514
7.0
12 Bit 20 MS/s Pipeline ADC
This pipelined ADC can be applied for up to 20MSps sampling frequencies. By using interleaved switched-capacitor circuitries a CLK signal with half ...
515
7.0
12 Bit 40 MS/s Pipeline ADC
This pipelined ADC can be applied for up to 40MSps sampling rates with on-chip track&hold block or continuous signal sampling....
516
7.0
12 Bit 54 kS/s Cyclic ADC
This cyclic ADC, based on redundant-signed-digit (RSD) conversion, is optimized for power efficiency and high accuracy. It provides 12 bit resolution ...
517
7.0
12-Bit 1 MS/s DAC with voltage output
The IP consists of a 12 bit current steering DAC. The DAC is connected to a transimpedance amplifier(TIA) in order to provide a voltage output signal....
518
7.0
15 Bit 192 kS/s Sigma-Delta ADC
The ADC IP is a general-purpose sigma-delta converter and it is configurable for conversion speed and power consumption with adaptable oversampling ra...
519
7.0
15 Bit 8 kS/s Sigma-Delta ADC
The ADC IP is a general-purpose sigma-delta converter and it is configurable for conversion speed and power consumption with adaptable oversampling ra...
520
7.0
16 Bit 10 kS/s Incremental Delta - Sigma ADC
On the one hand, incremental delta-sigma modulators are able to convert DC and multiplexed input signals as known from Nyquist ADCs. On the other hand...
521
7.0
16 Bit 13 kS/s Cyclic ADC
This cyclic ADC, based on redundant-signed-digit (RSD) conversion, is optimized for power efficiency and high accuracy. It provides 16 bit resolution ...
522
7.0
Ultra-Low Power 6 - 13 Bit 0.5 -10 kS/s 10μW Analog Front End
The Analog-Frontend (AFE) IP consists of programmable current and voltage preamplifier followed by a Successive Approximation Register (SAR) architect...
523
7.0
Ultra-Low Power 6 - 13 Bit 1-10 kS/s 1.9 μW SAR ADC
The IP consists of a Successive Approximation Register (SAR) architecture ADC using charge-redistribution technique. The ADC IP is configurable regard...
524
7.0
Ultra-low power RF receiver / WakeUp receiver
The integrated ultra-low power receiver technology RFicient® was developed for ISM frequency bands and built in standard CMOS technology. The receiver...
525
7.0
USB 2.0 Full/Low-Speed Device Core
The FHG USB DEV is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate full-speed USB 2.0 device functionality wi...
526
7.0
USB 2.0 Full/Low-Speed Embedded Host Controller
The FHG USB EHC is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate full-/low-speed USB 2.0 host functionality ...
527
7.0
USB 2.0 High/Full-Speed Device Core
The FHG USB2 DEV is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate high-/full-speed USB 2.0 device functiona...
528
7.0
USB 2.0 High/Full/Low-Speed Embedded Host Controller
The FHG USB2 EHC is a scalable, high performance IP-module for usage in ASIC and FPGA designs to integrate high/full/low-speed USB 2.0 host functiona...
529
7.0
USB 2.0 OTG Full/Low-Speed Dual Role Core
The FHG USB OTGDRD is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate full-/low-speed USB 2.0 device and host ...
530
7.0
USB 2.0 OTG High/Full/Low-Speed Dual Role Core
The FHG USB2 OTGDRD is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate high/full/low-speed USB 2.0 device and ...
531
2.0
N-channel Multiplexed FIR Filter
Multi-channel FIR filter permits any number of inputs to be multiplexed into the same filter architecture. Much cheaper than using multiple FIR filter...
532
2.0
4-Quadrant Arctan Function
Function φ = atan2(y,x) calculates the 4-quadrant inverse tangent in the range -Pi to Pi. Functionally equivalent to the atan2 function in 'C' an...
533
2.0
I2C Master Serial Interface Controller
Master serial interface compatible with the popular Philips® I2C standard. Features a simple command interface and permits multiple I2C slaves to be c...
534
2.0
I2C Slave Serial Interface Controller
Slave serial interface compatible with the popular Philips® I2C standard. Permits an I2C Master to communicate with your FPGA, CPLD or ASIC device. ...
535
2.0
Half-band Nyquist Decimation Filter
Fully configurable Nyquist decimation filter (down-sampler) with decimation factors from 2 to 2^N. The FIR filter is highly optimized for both spee...
536
2.0
Camera Link Interface
The Camera Link® IP Core is a high-speed LVDS transmitter / receiver pair that conforms to the standard Camera Link protocol originally developed by N...
537
2.0
Parallel FLASH Memory Controller
JEDEC® compliant FLASH memory controller ideal for interfacing to a wide range of parallel FLASH memory components such as the popular SST39 series fr...
538
2.0
UART to I2C Bridge Controller
Allows simple connectivity between a UART 2-wire port (Tx/Rx) and an I2C compatible bus. Allows simple programming and debug of an I2C device using a ...
539
2.0
Bayer to RGB Converter
Bayer-to-RGB converter interpolates the bayer pattern from a digital image sensor. Generates an output image at full 24-bit RGB resolution. Features ...
540
2.0
8b/10b Encoder/Decoder
Encoder/Decoder pair that implements the standard IBM® 8b/10b line code for a DC-balanced serial data stream. The 8b/10b code is a common encoding sc...
541
2.0
ADS-B 1090 MHz (ES) Receiver
ADS-B (ES) receiver offers a simple solution for the reception of ADS-B Flight and Traffic information. Compatible with all FPGA and ASIC devices, the...
542
2.0
RF Power Amplifier Precorrection System
Digital Precorrection (Predistortion) system used to compensate for the non-linearity of an RF power amplifier. Compensates for both Gain and Phase. T...
543
2.0
Chroma Re-sampler
Converts pixels in the YCbCr colour-space from 30-bit 4:4:4 format to 20-bit 4:2:2 and vice-versa. Features a fully pipelined design with simple flow...
544
2.0
Video Interlacer
Easy to use video interlacer IP Core converts all digital progressive video formats to interlaced equivalents. The design is fully programmable, allo...
545
2.0
High-Speed LVDS (SERDES) Transceiver
High-speed LVDS (SERDES) transceiver with up to 8 serial data lanes, generic data width and integrated asynchronous FIFO. Ideal for standard LVDS link...
546
2.0
Binary-FSK Demodulator
16-bit BFSK demodulator with complex or real data samples. Suitable for passband or baseband operation. Ideal for use in low cost / low power RF ap...
547
2.0
Binary-PSK Demodulator
16-bit BPSK demodulator ideal for low-cost radio links over a few 100m. Features automatic carrier lock with no complex PLL setup or tuning required. ...
548
2.0
Pipelined Divider
Function y = a / b is a very high-speed divider with configurable dividend and divisor width. Inputs and outputs may be specified as either signed or...
549
2.0
Pipelined Multiplier
Function y = a * b is a high-speed multiplier with configurable width and depth. Inputs and outputs may be specified as either signed or unsigned val...
550
2.0
Pipelined Square Root
Function y = √x is a fully scalable square-root function with configurable data width. Inputs and outputs are unsigned integers. An n-bit input valu...