Design & Reuse
5514 IP
5201
0.0
TSMC CLN5P 5nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
5202
0.0
TSMC CLN5P 5nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
5203
0.0
TSMC CLN5P 5nm Deskew PLL - 200MHz-1000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
5204
0.0
TSMC CLN5P 5nm Deskew PLL - 400MHz-2000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
5205
0.0
TSMC CLN5P 5nm Deskew PLL - 800MHz-4000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
5206
0.0
TSMC CLN5P 5nm General Purpose PLL - 400MHz-2000MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
5207
0.0
TSMC CLN5P 5nm IoT PLL - 30MHz-1000MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
5208
0.0
TSMC CLN5P 5nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
5209
0.0
TSMC CLN5P 5nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
5210
0.0
TSMC CLN5P 5nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
5211
0.0
TSMC CLN5P 5nm Multi Phase DLL - 200MHz-1000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
5212
0.0
TSMC CLN5P 5nm Multi Phase DLL - 400MHz-2000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
5213
0.0
TSMC CLN5P 5nm Multi Phase DLL - 800MHz-4000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
5214
0.0
TSMC CLN5P 5nm Spread Spectrum PLL - 175MHz-875MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
5215
0.0
TSMC CLN5P 5nm Spread Spectrum PLL - 350MHz-1750MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
5216
0.0
TSMC CLN5P 5nm Spread Spectrum PLL - 700MHz-3500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
5217
0.0
TSMC CLN5P 5nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
5218
0.0
TSMC CLN5PLVT 5nm Clock Generator PLL - 1200MHz-6000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
5219
0.0
TSMC CLN5PLVT 5nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
5220
0.0
TSMC CLN5PLVT 5nm Clock Generator PLL - 600MHz-3000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
5221
0.0
TSMC CLN5PLVT 5nm DDR DLL - 270MHz-1350MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
5222
0.0
TSMC CLN5PLVT 5nm DDR DLL - 360MHz-1800MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
5223
0.0
TSMC CLN5PLVT 5nm DDR DLL - 568MHz-2840MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
5224
0.0
TSMC CLN5PLVT 5nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
5225
0.0
TSMC CLN5PLVT 5nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
5226
0.0
TSMC CLN5PLVT 5nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
5227
0.0
TSMC CLN5PLVT 5nm Deskew PLL - 1200MHz-6000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
5228
0.0
TSMC CLN5PLVT 5nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
5229
0.0
TSMC CLN5PLVT 5nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
5230
0.0
TSMC CLN5PLVT 5nm General Purpose PLL - 600MHz-3000MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
5231
0.0
TSMC CLN5PLVT 5nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
5232
0.0
TSMC CLN5PLVT 5nm LPDDR4 PHY - 4266Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
5233
0.0
TSMC CLN5PLVT 5nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
5234
0.0
TSMC CLN5PLVT 5nm Multi Phase DLL - 1200MHz-6000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
5235
0.0
TSMC CLN5PLVT 5nm Multi Phase DLL - 300MHz-1500MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
5236
0.0
TSMC CLN5PLVT 5nm Multi Phase DLL - 600MHz-3000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
5237
0.0
TSMC CLN5PLVT 5nm Spread Spectrum PLL - 1050MHz-5250MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
5238
0.0
TSMC CLN5PLVT 5nm Spread Spectrum PLL - 262MHz-1310MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
5239
0.0
TSMC CLN5PLVT 5nm Spread Spectrum PLL - 524MHz-2620MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
5240
0.0
TSMC CLN5PLVT 5nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
5241
0.0
TSMC CLN65GP 65nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
5242
0.0
TSMC CLN65LP 65nm IoT PLL - 30MHz-300MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
5243
0.0
TSMC CLN65LP 65nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
5244
0.0
TSMC CLN65ULP 65nm Clock Generator PLL - 100MHz-500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
5245
0.0
TSMC CLN65ULP 65nm Clock Generator PLL - 200MHz-1000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
5246
0.0
TSMC CLN65ULP 65nm Clock Generator PLL - 50MHz-250MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
5247
0.0
TSMC CLN65ULP 65nm DDR DLL - 126MHz-630MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
5248
0.0
TSMC CLN65ULP 65nm DDR DLL - 60MHz-300MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
5249
0.0
TSMC CLN65ULP 65nm DDR DLL - 80MHz-400MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
5250
0.0
TSMC CLN65ULP 65nm Deskew PLL - 100MHz-500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...