Design & Reuse
Catalog of SIP Cores
System on Chip design resources
5654 IP
551
0.0
Simulation VIP for PCIe
Used by all leading PCIe, IP, and SoC design verification teams for all generations....
552
0.0
Simulation VIP for PIPE PHY
The Cadence® PIPE PHY Verification IP (VIP) provides a mature, highly capable verification solution for the PHY layer of complex protocols such as PCI...
553
0.0
Simulation VIP for PLB
In production since 2011....
554
0.0
Simulation VIP for PMBus
Incorporating the latest protocol updates, the Cadence® Verification IP (VIP) for PMBus provides a complete bus functional model (BFM), integrated aut...
555
0.0
Simulation VIP for Q-SPI
In production since 2018 for many production designs....
556
0.0
Simulation VIP for SAS
The Cadence® Verification IP (VIP) for SAS is part of Cadence’s broad storage interface verification IP (VIP) portfolio. Serial Attached SCSI (SAS) ha...
557
0.0
Simulation VIP for SD CARD and SDIO
In production since 2012 for many production designs....
558
0.0
Simulation VIP for SMBus
Incorporating the latest protocol updates, the Cadence® Verification IP (VIP) for SMBus provides a complete bus functional model (BFM), integrated aut...
559
0.0
Simulation VIP for SPDIF
Incorporating the latest protocol updates, the mature and comprehensive Cadence® Verification IP (VIP) for the SPDIF protocol provides a complete bus ...
560
0.0
Simulation VIP for SPI
This Cadence® Verification IP (VIP) provides support for the SPI protocol. The SPI VIP provides a complete bus functional model (BFM) and integrated a...
561
0.0
Simulation VIP for SPI NAND
In production since 2016 for many production designs....
562
0.0
Simulation VIP for TileLink
This Cadence® Verification IP (VIP) provides support for the TileLink specification. It provides a highly capable compliance verification solution sim...
563
0.0
Simulation VIP for Toggle NAND
In production since 2011 for many production designs....
564
0.0
Simulation VIP for UART
Best-in-class UART Verification IP for your IP, SoC and system-level design testing. In production since 2014 on dozens of production designs....
565
0.0
Simulation VIP for UCIE
Best-in-Class UCIe Verification IP for your IP, SoC, and System-Level Design Testing The Cadence Verification IP (VIP) for Universal Chiplet Interconn...
566
0.0
Simulation VIP for UCIE
Best-in-class UCIe Verification IP for your IP, SoC, and system-level design testing....
567
0.0
Simulation VIP for UFS
In production since 2012 on multiple production designs....
568
0.0
Simulation VIP for USB
The Cadence® Verification IP (VIP) for USB is a complete VIP solution for the Universal Serial Bus Revision 3.2 Specification and errata. It provides ...
569
0.0
Simulation VIP for USB4
Used by all top market leaders semiconductor companies....
570
0.0
Simulation VIP for xSPI
xSPI in production since 2019 for many production designs....
571
0.0
RISC-V high performance CPU
Ventana s first generation RISC-V high performance CPU is targeted at data center, edge, and other general computing applications. The configurable CP...
572
0.0
Bluetooth 5.x Low Energy (BLE) RF Transceiver
Orca’s ultra-low power Bluetooth low energy RF transceiver and modem is a best-in-class Bluetooth 5 low energy design for battery-powered IoT and M2M ...
573
0.0
Conformal AI Studio
Verify Designs for Silicon Success with Conformal AI Studio The Cadence Conformal AI Studio, which includes logical equivalence checking (LEC), autom...
574
0.0
Controller for DDR
LPDDR5/4X/4/3 and DDR5/4/3L/3, to 6400Mbps and beyond The Cadence Denali Controller IP for LPDDR5/4X/4/3 and DDR5/4/3L/3 provides low latency and u...
575
0.0
Controller for GDDR6
GDDR6 devices to 16Gbps, 18Gbps, 20Gbps, and beyond The latest, the Cadence Denali Controller IP for GDDR6, provides low latency and very high band...
576
0.0
FortifyIQ's Secure Hybrid Crypto Box IP Core with Classical and Post-Quantum Cryptography for Embedded Systems (AES, HMAC-SHA2, ECC/RSA etc., PQC) (SCA,DPA,FIA secure)
FortifyIQ’s Hybrid Crypto Box IP core is a comprehensive, high-efficiency cryptographic solution that combines RSA, ECC, AES, and SHA-2/HMAC with a bu...
577
0.0
LPDDR4X/4/3/DDR4 PHY for TSMC
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and ext...
578
0.0
LPDDR4X/4/3/DDR4 PHY for TSMC 12nm and 16nm
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and ext...
579
0.0
LPDDR4X/4/3/DDR4 PHY for UMC
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and ext...
580
0.0
LPDDR5/4X PHY IP for TSMC
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
581
0.0
LPDDR5/4X PHY IP for TSMC N7
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
582
0.0
LPDDR5/5X Memory PHY for Intel
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
583
0.0
LPDDR5/5X Memory PHY for Samsung
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
584
0.0
LPDDR5/5X Memory PHY for TSMC
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
585
0.0
LPDDR5/5X Memory PHY for TSMC N3P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
586
0.0
LPDDR5/5X Memory PHY for TSMC N4P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
587
0.0
LPDDR5/5X Memory PHY for TSMC N5P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
588
0.0
LPDDR6/5X Memory PHY for Rapidus
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
589
0.0
LPDDR6/5X Memory PHY for Samsung
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
590
0.0
LPDDR6/5X Memory PHY for TSMC
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
591
0.0
USB 2.0 PHY for Samsung
Proven PHY IP for USB Device, Host, and OTG with small footprint and low active power The ubiquity of USB 2.0 in devices makes it nearly mandatory ...
592
0.0
USB 2.0 PHY for Samsung 7LPP
Proven PHY IP for USB Device, Host, and OTG with small footprint and low active power The ubiquity of USB 2.0 in devices makes it nearly mandatory fo...
593
0.0
USB 3.x PHY for Intel
Proven PHY IP for USB Device, Host, and DRD with small footprint and low active power The ubiquity of USB 3.x in devices makes it nearly mandatory ...
594
0.0
USB 3.x PHY for Samsung
Proven PHY IP for USB Device, Host, and DRD with small footprint and low active power The ubiquity of USB 3.x in devices makes it nearly mandatory ...
595
0.0
USB 3.x PHY for TSMC
Proven PHY IP for USB Device, Host, and DRD with small footprint and low active power The ubiquity of USB 3.x in devices makes it nearly mandatory ...
596
0.0
LTE Category M1 / NB1 (NB-IoT) RF Transceiver
Orca's digital ultra-low power ORC3010 LTE Category M1 / NB1 (NB-IoT) transceiver is designed and optimized for the smallest, lowest-power IoT and...
597
0.0
eUSB2v2 Controller
Proven solution featuring host and peripheral eUSB2V2 scales up to 4.8Gbps of data rate with the flexibility to configure asymmetrical or symmetric...
598
0.0
eUSB2V2 PHY
Low voltage USB 2.0 supporting 4.8Gbps eUSB2V2 is primarily a performance enhancement to eUSB2 native mode to provide more bandwidth for peripherals,...
599
0.0
eUSB2V2 PHY for TSMC
Low voltage USB 2.0 supporting 4.8Gbps eUSB2V2 is primarily a performance enhancement to eUSB2 native mode to provide more bandwidth for peripheral...
600
10.0
Creonic - Design Services, Communication Systems
Creonic offers communications system design services for ASIC and FPGA. Our know-how comprises the integration of many components of signal processing...