Design & Reuse
4951 IP
851
28.0
LPDDR5X Secondary/Slave (memory side!) PHY
This LPDDR5X PHY is a memory-side interface IP normally found implemented within commodity DRAM products. Green Mountain Semiconductor's LPDDR5X IP pr...
852
25.0
I3C Advanced Controller, V1.1
I3C is a new a standard from the MIPI Alliance that unifies and extends the legacy interfaces of I2C and SPI and adds new powerful features to sup...
853
25.0
I3C Advanced Controller, V1.1 Lite
The I3C Advanced Controller Lite is a highly configurable I3C controller that can be used in microcontroller-based environments to provide I3C con...
854
25.0
I3C Advanced Target, V 1.1 Lite
The I3C Advanced Target Lite is a highly configurable I3C Target that can be used in microcontroller based environments to provide I3C connectivit...
855
25.0
I3C Advanced Target, V1.1
The I3C Advanced Target is a highly configurable I3C Target that can be used in microcontroller based environments to provide I3C connectivity to ...
856
25.0
I3C Autonomous Target, V1.1
The I3C Autonomous Target is intended for simple, data acquisition types of applications where a microprocessor is not needed to process the data....
857
25.0
WAVE-P, Advanced Professional Video, APV New!
Advanced Professional Video (APV) codec is a new codec for prosumers ​ who do not want to compromise on quality while enjoying the convenience of ​ ...
858
25.0
HBM2E PHY V2 (Hard 1) in TSMC (N7, N6, N5)
The Synopsys HBM2/HBM2E PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), graphics, and networking A...
859
25.0
HBM2E PHY V2 in TSMC (N7, N6, N5)
The Synopsys HBM2/HBM2E PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), graphics, and networking A...
860
25.0
LDO Voltage Regulator 250 mA, TSMC N3P
The LDO IP is a 1.2V low-quiescent-current adjustable output voltage Low-Drop-Out (LDO) Linear Regulator implemented in the TSMC 3nm N3P CMOS process ...
861
25.0
LDO Voltage Regulator Adjustable 0.45 V to 0.9 V Output, 30 mA
The LDO IP is a 1.2V low-quiescent-current adjustable output voltage Low-Drop-Out (LDO) Linear Regulator implemented in the TSMC 3nm N3P CMOS process ...
862
25.0
1G/10G TCP/IP Hardware Stack
The TCPIP-1G/10G core implements a complete TCP/IP Hardware Protocol Stack. More capable than many offloading engines, it allows systems to connect to...
863
25.0
LINFlexD Controller
The LINFlexD Controller is a serial communication interface designed for Local Interconnect Network (LIN) applications. The LINFlexD manages a high nu...
864
25.0
FlexCAN Controller
The FlexCAN controller is a highly configurable, synthesizable core implementing the CAN protocol (ISO 11898-1), CAN with Flexible Data rate (CAN FD),...
865
25.0
FlexRay Controller
The FlexRay Controller fully complies with FlexRay Communication System Protocol Specification, Version 2.1, Revision A. It implements the specificati...
866
25.0
Ultra-Fast Baseline and Extended JPEG Decoder Core
This JPEG decompression IP core supports the Baseline Sequential DCT and Extended Sequential DCT modes of the ISO/IEC 10918-1 standard. It implements ...
867
25.0
LPDDR5X/5/4X/4 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
868
25.0
LPDDR5X/5/4X/4 PHY for 16nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
869
25.0
LPDDR5X/5/4X/4 PHY IP for 12nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
870
25.0
Process Detector (For DVFS and monitoring process variation)
An embedded process detector circuit which helps Integrated Circuit (IC) developers to address the problem of process variability on low-geometry CMOS...
871
25.0
Process Detector (For DVFS and monitoring process variation)
An embedded process detector circuit which helps Integrated Circuit (IC) developers to address the problem of process variability on low-geometry CMOS...
872
25.0
Process Detector (For DVFS and monitoring process variation)
An embedded process detector circuit which helps Integrated Circuit (IC) developers to address the problem of process variability on low-geometry CMOS...
873
25.0
Process Detector (For DVFS and monitoring process variation), TSMC 12FFC
An embedded process detector circuit which helps Integrated Circuit (IC) developers to address the problem of process variability on low-geometry CMOS...
874
25.0
TSN Ethernet Endpoint Controller
The TSN-EP implements a configurable controller meant to ease the implementation of endpoints for networks complying to the Time Sensitive Networking ...
875
25.0
TSN Ethernet Switch
The TSN-SW implements a highly flexible, low-latency TSN Ethernet switch. It supports Ethernet bridging according to the IEEE 802.1Q-2018 standard and...
876
25.0
MultiCAN Controller
Since its introduction in the mid-1980s, the Controller Area Network (CAN) has become a standard network protocol for automotive applications. Cars ma...
877
20.0
1.8V/3.3V I2C 5V Failsafe Failtolerant Automotive Grade 1 in GF (12nm)
Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...
878
20.0
1.8V/3.3V I2C 5V Failsafe Failtolerant Automotive Grade 1 in GF (22nm)
Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...
879
20.0
1.8V/3.3V I2C in GF (12nm)
Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...
880
20.0
13-bit, 80 MSPS Analog-to-Digital Converter (ADC) IP Block TSMC 65nm
The A13B80M is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a hybrid-SAR ADC, with 13-bit ...
881
20.0
CAT Trip Sensor, TSMC N4P
The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a remote thermal sensor...
882
20.0
HBM3 PHY (Hard 1) in TSMC (N6, N5)
The Synopsys HBM3 PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking ASIC...
883
20.0
HBM3 PHY in TSMC (N5, N6, N7)
The Synopsys HBM3 PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking ASIC...
884
20.0
PCIe 2.0 PHY in Fujitsu (40nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...
885
20.0
PCIe 2.0 PHY in GF (40nm, 28nm, 22nm, 12nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...
886
20.0
PCIe 2.0 PHY in SMIC (40nm, 28nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...
887
20.0
PCIe 2.0 PHY in TSMC (28nm, 16nm, 12nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...
888
20.0
PCIe 2.0 PHY in UMC (40nm, 28nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...
889
20.0
PCIe 3.0 PHY in GF (28nm, 22nm)
The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
890
20.0
PCIe 3.0 PHY in UMC (28nm)
The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
891
20.0
PCIe 4.0 PHY in GF (14nm, 12nm)
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
892
20.0
PCIe 4.0 PHY in Samsung (14nm, 11nm, SF5A, SF2, SF2P)
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
893
20.0
GDDR6 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
894
20.0
HDMI 2.0 RX 1P PHY 6Gbps in TSMC (28nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
895
20.0
HDMI 2.0 RX 4P PHY 6Gbps in TSMC (28nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
896
20.0
HDMI 2.0 RX PHY in Samsung (8nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
897
20.0
HDMI 2.0 TX PHY 6Gbps in SMIC (28nm)
The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...
898
20.0
HDMI 2.0 TX PHY 6Gbps in TSMC (28nm, 16nm, 12nm)
The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...
899
20.0
HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC (28nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
900
20.0
HDMI 2.0/MHL TX Combo 6Gbps in TSMC (28nm)
The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...