Arasan Chip Systems Inc. IP Cores

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201

0.118

Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm LP/RVT LowK Logic Process

Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm LP/RVT LowK Logic Process...

202

0.118

Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process

Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process...

203

0.118

Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process

Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process...

204

0.118

Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for copper pillar bump Flip chip version ; UMC 40nm LP LowK Logic Process

Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for copper pillar bump Flip chip version ; UMC 40nm LP LowK Logic Process...

205

0.118

Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process

Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process...

206

0.118

DDR2 PHY Command/Address Block (for Chip Application); UMC 0.13um HS/FSG Logic Process

DDR2 PHY Command/Address Block (for Chip Application); UMC 0.13um HS/FSG Logic Process...

207

0.118

DDR2-PHY command/address block for DRAM chip, BOAC ; UMC 90nm SP/RVT Low-K Logic Process

DDR2-PHY command/address block for DRAM chip, BOAC ; UMC 90nm SP/RVT Low-K Logic Process...

208

0.118

DDR2/MDDR COMBO PHY Data block for Chip usage ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process

DDR2/MDDR COMBO PHY Data block for Chip usage ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process...

209

0.118

DDR2/MDDR Combo PHY for Chip load usage ; UMC 65NM SP-RVT with 2.5V device LowK Logic Process

DDR2/MDDR Combo PHY for Chip load usage ; UMC 65NM SP-RVT with 2.5V device LowK Logic Process...

210

0.118

DDR34 COMBO PHY ADDR Block for Solder bump Flip chip version ;UMC 40nm LP/RVT Logic Process

DDR34 COMBO PHY ADDR Block for Solder bump Flip chip version ;UMC 40nm LP/RVT Logic Process...

211

0.118

DDRII Data Block for Chip Application; UMC 0.11um HS/AE (AL Advance Enhancement) Logic Process

DDRII Data Block for Chip Application; UMC 0.11um HS/AE (AL Advance Enhancement) Logic Process...

212

0.118

DDRII Data Block for Chip Application; UMC 0.13um HS/FSG Logic Process

DDRII Data Block for Chip Application; UMC 0.13um HS/FSG Logic Process...

213

0.118

Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application (compliant to DFI); UMC 55nm SP/RVT LowK Logic Process

Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application (compliant to DFI); UMC 55nm SP/RVT LowK Logic Process...

214

0.118

Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application (compliant with DFI spec); UMC 40nm LP LowK Logic Process

Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application (compliant with DFI spec); UMC 40nm LP LowK Logic Process...

215

0.118

Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm LP/RVT LowK Logic Process

Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm LP/RVT LowK Logic Process...

216

0.118

Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm LP/RVT LowK Logic Process

Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm LP/RVT LowK Logic Process...

217

0.118

Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process

Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process...

218

0.118

Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application;UMC 55nm SP/RVT LowK PROCESS.

Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application;UMC 55nm SP/RVT LowK PROCESS....

219

0.118

Command/Address Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process

Command/Address Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process...

220

0.118

Command/Address Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY supporting 2-rank application for Copper Pillar Bump Flip Chip Version; UMC 40nm LP LVT/RVT LowK Logic Process

Command/Address Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY supporting 2-rank application for Copper Pillar Bump Flip Chip Version; UMC 40nm LP LVT/RVT...

221

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USB2.0 OTG PHY UMC 40nm LP/RVT process, for Flip chip Bump type_LF

USB2.0 OTG PHY UMC 40nm LP/RVT process, for Flip chip Bump type_LF...

222

0.118

LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, for flip chip

LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, for flip chip...

223

0.0

UALink DL

he Chip Interfaces UA Link DL IP Core is a high-performance, silicon-agnostic and fully compliant Data Layer implementation of UALink_200 specifi cati...

224

0.0

UALink TL

The Chip Interfaces UA Link TL IP Core is a high-performance, silicon-agnostic and fully compliant Transaction Layer implementation of UALink_200 spec...

225

0.0

VeriHealth - one-stop health chip design platform

Based on VeriSilicon s own low-power IP series and advanced SoC customization technologies, VeriHealth provides a complete wearable health monitoring ...

226

0.0

BLE 5 / Sub-1GHz / 15.4/ SoC Companion Chip

A complete RF Modem companion chip for adding Bluetooth Low Energy v5.x (2.4GHz), Sub-1GHz (150-960MHz), 802.15.4(Zigbee),capability to any embedded C...

227

0.0

Ultrasound AFE Transceiver Chip for CMUT Transducers

The MVUS01 ultrasound transducer interface is the first generation of high-voltage (HV) ultrasound ASICs intended for portable medical imaging probes ...

228

0.0

Image Signal Processing, Real-time Pixel Processor Consumer

The H Series represents Dream Chips's scalable and configurable Standard Dynamic Range 12-bit ISP platform, delivering high-quality imaging with low l...

229

0.0

XPHY Low power Chip to Chip SerDes IP, Silicon Proven in ST 28FDSOI

These IPs are targeted at applications requiring high speed, high bandwidth, low-power consumption, and low-latency interfaces....

230

0.0

TSMC CLN12FFC Chip Performance Monitor

IGACPMV08A is an on-chip performance monitor which contains a maximum of 32 customized multiple ring oscillators. This macro is one sensor unit of chi...

231

0.0

TSMC CLN5FF Chip Performance Monitor

IGACPMY01A is an on-chip performance monitor which contains a maximum of 32 customized multiple ring oscillators. This macro is one sensor unit of chi...

232

0.0

TSMC CLN7FF Chip Performance Monitor

IGACPMX01A is an on-chip performance monitor which contains a maximum of 32 customized multiple ring oscillators. This macro is one sensor unit of chi...

233

44.0

FlexNoC 5 Option For Scalability and Performance Critical Systems

Arteris IP FlexNoC Performance Option accelerates development of next-generation deep neural network (DNN) and machine learning systems. Automate and ...

234

14.0

200G/400G High Speed Ethernet Controller MAC/PCS/FEC

200G/400G bandwidth solution for one Ethernet channel Cadence High Speed Ethernet Controller IP supports single channel Ethernet applications for hig...

235

14.0

400G/800G High Speed Ethernet Controller MAC/PCS/FEC

800G/400G bandwidth solution for one Ethernet channel Cadence High Speed Ethernet Controller IP supports single channel Ethernet applications for hig...

236

14.0

400G/800G High Speed Ethernet Controller PCS/FEC

Up to 800G bandwidth solution for one Ethernet channel Cadence High Speed Ethernet Controller IP supports single channel Ethernet applications for hi...

237

14.0

10G to 100G High Speed Ethernet Controller MAC/PCS/FEC

Up to 100G bandwidth solution for one Ethernet channel Cadence High Speed Ethernet Controller IP supports single channel Ethernet applications for hi...

238

14.0

10G to 400G High Speed Channelized Ethernet Controller MAC/PCS/FEC

400G aggregate bandwidth channelized solution for up to eight Ethernet channels Cadence High Speed Ethernet Controller IP supports multi-channel Ethe...

239

14.0

10G to 400G High Speed Ethernet Controller MAC/PCS/FEC

Up to 400G bandwidth solution for one Ethernet channel Cadence High Speed Ethernet Controller IP supports single channel Ethernet applications for hi...

240

14.0

40G Ultralink D2D PHY for GF12LP+

Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity The Cadence® UltraLink™ ...

241

14.0

40G Ultralink D2D PHY for GF12LP+

Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity The Cadence® UltraLink™ ...

242

14.0

40G Ultralink D2D PHY for Samsung 7LPP

Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity The Cadence® UltraLink™ ...

243

14.0

40G Ultralink D2D PHY for Samsung 7LPP

Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity The Cadence® UltraLink™ ...

244

14.0

10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications

Configurable MAC solutions for speeds from 10Gbps to 10Mbps The Cadence 10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications is...

245

14.0

10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications

Configurable MAC solutions for speeds from 10Gbps to 10Mbps The Cadence 10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications is...

246

14.0

10Gbps Multi-Link and Multi-Protocol PCIe 3.1 PHY IP for TSMC

Silicon-proven PHY for PCIe, USB, Ethernet, DisplayPort, and other protocols The Cadence® 10Gbps Multi-Link and Multi-Protocol PHY IP provides a flex...

247

14.0

10Gbps Multi-Protocol PHY IP

Silicon-proven PHY for PCIe, USB, Ethernet, DisplayPort, and other protocols The PHY IP is designed to deliver high eye-margin at low power for backp...

248

14.0

I3C Controller

Controller IP for the MIPI I3C interface The Cadence® IP Family for MIPI® Protocols delivers area-optimized interface IP with the low power and high ...

249

14.0

Cadence Neo NPUs

The Cadence Neo NPUs offer energy-efficient hardware-based AI engines that can be paired with any host processor for offloading The Neo NPUs target a...

250

14.0

NAND Flash Controller

Cadence IP Controller for ONFI NAND and Toggle NAND NAND Flash memory is widely used for data storage in computers and multiple consumer and enterpri...

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