Design & Reuse
4953 IP
2751
0.0
VC Functional Safety Manager
VC Functional Safety Manager provides a comprehensive tool for IP and semiconductor groups targeting functional safety certification for ISO 26262, IE...
2752
0.0
VC Verification IP for AMBA 4 AXI
Synopsys VC Verification IP (VIP) for ARM® AMBA® AXI™ provides complete protocol support for AXI3™, AXI4™, AXI4-Lite™, AXI4-Stream™, ACE™, ACE-Lite™ ,...
2753
0.0
VC Verification IP for AMBA 5 CHI
Synopsys VC Verification IP (VIP) for ARM® AMBA® 5 CHI protocol specification provides a comprehensive set of protocol, methodology, verification and ...
2754
0.0
VC Verification IP for CPRI
Synopsys® VC Verification IP for CPRI provides a comprehensive set of protocol, methodology, verification, and productivity features, enabling users t...
2755
0.0
VC Verification IP for DDR5
Synopsys® VC Verification IP for JEDEC DDR5, deployed in November 2016, provides a comprehensive set of protocol, methodology, verification, and produ...
2756
0.0
VC Verification IP for Ethernet
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2757
0.0
VC Verification IP for Ethernet
Synopsys VC Verification IP (VIP) for Ethernet provides complete support for Ethernet 10/100/1000M/10G/40G and 100G interfaces. With a comprehensive s...
2758
0.0
VC Verification IP for Fibre Channel
Synopsys VC Verification IP (VIP) for Fibre Channel is designed to thoroughly verify Fibre Channel designs using both random and directed simulation. ...
2759
0.0
VC Verification IP for HDMI
Synopsys VC Verification IP (VIP) for HDMI provides a comprehensive set of protocol, methodology, verification and productivity features, enabling use...
2760
0.0
VC Verification IP for HSI
Synopsys VC Verification IP for MIPI HSI is a comprehensive VIP solution enabling pre-silicon functional verification of MIPI HSI (High-speed synchron...
2761
0.0
VC Verification IP for I2C
Synopsys VC Verification IP for I2C includes all protocol speeds. With a comprehensive set of protocols, methodology, verification and ease-of-use fea...
2762
0.0
VC Verification IP for I2S
Synopsys VC Verification IP (VIP) for I2S provides a comprehensive set of protocol, methodology, verification and productivity features, enabling user...
2763
0.0
VC Verification IP for Interlaken
Synopsys® VC Verification IP for Interlaken provides a comprehensive set of protocol, methodology, verification and productivity features, enabling us...
2764
0.0
VC Verification IP for MIPI CSI-2 (C-PHY / D-PHY)
Synopsys VC Verification IP (VIP) for MIPI Camera Serial Interface 2 (CSI-2) provides a comprehensive set of protocol, methodology, verification and p...
2765
0.0
VC Verification IP for MIPI DigRFv4
Synopsys VC Verification IP for MIPI DigRF provides a comprehensive set of protocol, methodology, verification and productivity features, enabling use...
2766
0.0
VC Verification IP for MIPI DSI
Synopsys® Verification IP (VIP) for UCIe provides a comprehensive set of protocol, multi-die, methodology, verification, and productivity features ena...
2767
0.0
VC Verification IP for MIPI DSI
Synopsys VC Verification IP for MIPI Display Serial Interface (DSI) provides a comprehensive set of protocol, methodology, verification and productivi...
2768
0.0
VC Verification IP for MIPI M-PHY
Synopsys VC Verification IP for MIPI M-PHY provides a comprehensive set of protocol, methodology, verification and productivity features, enabling use...
2769
0.0
VC Verification IP for NVMe
Synopsys VC VIP for Non-Volatile Memory Express (NVMe) is designed to help thoroughly verify NVMe designs using both random and directed simulation....
2770
0.0
VC Verification IP for OCP
Synopsys VC Verification IP (VIP) for OCP provides a comprehensive set of protocol, methodology, verification and productivity features enabling users...
2771
0.0
VC Verification IP for PCIe
Synopsys VC Verification IP (VIP) for PCI Express (PCIe) provides a comprehensive set of protocol, methodology, verification and productivity features...
2772
0.0
VC Verification IP for SAS
Synopsys VC Verification IP (VIP) Serial SCSI (SAS) is designed to thoroughly verify your design using both random and directed simulation....
2773
0.0
VC Verification IP for SATA
Synopsys VC Verification IP (VIP) for Serial ATA (SATA) is designed to verify SATA-based designs using both random and directed simulation....
2774
0.0
VC Verification IP for SDIO
Synopsys VC Verification IP (VIP) for SDIO is a comprehensive VIP solution enabling pre-silicon functional verification of SD (Secure Digital) IO/Memo...
2775
0.0
VC Verification IP for TileLink
Synopsys® Verification IP for TileLink provides a comprehensive set of protocol, methodology, verification, and productivity features, enabling users ...
2776
0.0
VC Verification IP for UART
Synopsys VC Verification IP (VIP) for UART provides a comprehensive set of protocol, methodology, verification and productivity features, enabling use...
2777
0.0
VC Verification IP for UFS
Synopsys® VC Verification IP for the JEDEC UFS memory protocol specification provides a comprehensive set of protocol, methodology, verification and p...
2778
0.0
VC Verification IP for USB
Synopsys® VC Verification IP for USB provides a comprehensive set of protocol, methodology, verification and productivity features, enabling users to ...
2779
0.0
TCAM Compilers for Samsung (14nm, 10nm, SF5A, SF4X)
Synopsys embedded ternary content addressable memories (TCAMs) help networking designers meet the demand for wire-speed packet processing, access cont...
2780
0.0
TCAM Compilers for SMIC (28nm)
Synopsys embedded ternary content addressable memories (TCAMs) help networking designers meet the demand for wire-speed packet processing, access cont...
2781
0.0
TCAM Compilers for TSMC (65nm, 40nm, 28nm, 16nm, N7, N6, N5, N4
Synopsys embedded ternary content addressable memories (TCAMs) help networking designers meet the demand for wire-speed packet processing, access cont...
2782
0.0
Scatter-Gather DMA - AXI4-Stream to/from AXI4 Memory Map Transfers
The Digital Blocks DB-DMAC-MC-AXI4-MM-STREAM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Mem...
2783
0.0
Scatter-Gather DMA - AXI4-Stream to/from AXI4 Memory Map Transfers
The Digital Blocks DB-DMAC-MC-AXI4-MM-STREAM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Mem...
2784
0.0
ECC Core
Rambus Error Correction Coding (ECC) Core implements the standard Hamming Code based DRAM Single Error Correction (SEC) and Double Error Detection (DE...
2785
0.0
ACCUREF - Low Power Voltage and Current Reference Circuit, 0.3% Accuracy, 90 dB PSR in TSMC C130BCD
This intellectual property (IP) core generates a precise/adjustable reference voltage (VREF), as well as two sets of reference output currents using b...
2786
0.0
LCD Controller - TFT LCD Panels (AXI4 Bus)
The Digital Blocks DB9000AXI4 TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA 4.0 AXI4 Protocol Interconne...
2787
0.0
PCI Express Verification Component
The PCI Express eVC can be used for verification of a device that supports the PCI Express standard. The eVC is compliant to PCI Express Base Specific...
2788
0.0
PCI Master/Target Interface Core
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2789
0.0
PCI to AMBA AHB Host Bridge
This PCI Host Bridge IP core enables data transfers between an AMBA® AHB host processor bus system and PCI bus based devices. The bridge enables high...
2790
0.0
PCI-X Arbiter Supporting 66 / 100 / 133MHz
In PCI-X systems, a central controller is used to manage bus ownership. This controller, called arbiter, selects the next master during The PCIXarbit...
2791
0.0
PCI-X Verification Component
eVCs are reusable Verification Components that can be used to establish ready-made verification environment. Each eVC is capable of acting as full ver...
2792
0.0
PCIe 1.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect
Rambus PCIe 1.1 Controller with AXI is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 1.1 ...
2793
0.0
PCIe 2.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect
Rambus PCIe 2.1 Controller with AXI is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 2.1 ...
2794
0.0
PCIe 2.1 Controller with the PHY Interface for PCI Express (PIPE) specification and native user interface support
Rambus PCIe 2.1 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 2.1 Controlle...
2795
0.0
PCIe 3.0 PHY in Samsung (SF5A
The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
2796
0.0
PCIe 3.0 PHY in TSMC (28nm, 12nm, N4P)
The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
2797
0.0
PCIe 3.0, 2.1, 1.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with AMBA AXI User Interface
Rambus PCIe 3.0 with AXI is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 3.0 with AXI is...
2798
0.0
PCIe 3.0, 2.1, 1.1 Controller with the PHY Interface for PCI Express (PIPE) specification and native user interface support
Rambus PCIe 3.0 Controller is a highly configurable PCIe 3.0 interface Soft IP designed for ASIC and FPGA implementations supporting endpoint, root po...
2799
0.0
PCIe 4.0 Controller with AMBA AXI interface
Rambus PCIe 4.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. The Rambus PCIe 4.0 Contr...
2800
0.0
PCIe 4.0 PHY in Samsung (8nm) for Automotive
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...