Design & Reuse
Catalog of SIP Cores
System on Chip design resources
5620 IP
3851
0.0
High Speed Access & Test IP PCIE Version
High speed access for test and in-chip sensor & monitor data throughout the silicon lifecycle. Within the SiliconMAX Platform, High-Speed Access & Tes...
3852
0.0
High Speed Access & Test IP USB Version
High speed access for test and in-chip sensor & monitor data throughout the silicon lifecycle. Within the SiliconMAX Platform, High-Speed Access & Tes...
3853
0.0
High-Performance Imaging System Development
Alphacore is a leader in high-performance data capture and Imaging Systems for harsh environments demanded by space, defense, homeland security, medic...
3854
0.0
High-Performance Lossless Compression Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from the compressed data. ...
3855
0.0
High-speed clock receiver circuit operating up to 2.5 GHz with low output jitter.
The ODT-CRX-2P5G-16 is a high-speed clock receiver circuit capable of operating up to 2.5 GHz with low output jitter. The CRX uses a high-speed signal...
3856
0.0
High-speed CMOS Image Sensor
Alphacore Imaging Solutions provide high video frame rate (up to 10k frames/sec), minimum integration time, clear still shots, pictures in low light c...
3857
0.0
Highest performance four-issue, out-of-order RISC-V vector application processors
The latest generation SiFive Performance™ P600-Series processors are the highest performance commercially licensable RISC-V processors....
3858
0.0
Eight Channel (8CH) LVDS Serializer in Samsung 28FDSOI
The 28FDSOI-LVDS-1250-8CH-TX-PLL is a high performance 8-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parall...
3859
0.0
Digital Blocks - SoC Design services
Digital Blocks architects, designs, verifies, and markets semiconductor IP cores to worldwide technology systems companies. We Can Customize Our IP ...
3860
0.0
Digital Cinema LCD Controller
The Digital Blocks DB9000AXI-DCI LCD Controller IP Core interfaces a video image in frame buffer memory via the AMBA 3.0 / 4.0 AXI Protocol Interconne...
3861
0.0
Digital Media Professionals - Design Services
ZIA SAFE Safety Driving Assistance DevelopmentProfessional service, enabling to develop an advanced safe driving support system in a short period of t...
3862
0.0
Signle Port High-Current SRAM Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option
Signle Port High-Current SRAM Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option...
3863
0.0
Signle Port High-Density SRAM Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option
Signle Port High-Density SRAM Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option...
3864
0.0
Signle Port Multi-Bank High-Density SRAM Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option
Signle Port Multi-Bank High-Density SRAM Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT...
3865
0.0
Silicon Storage Technology - Custom Design Services
Silicon Storage Technology, Inc. (SST), is the creator of SuperFlash® , an innovative, highly reliable and versatile type of NOR Flash memory. SST, th...
3866
0.0
Time-Sensitive Networking
Due to the increased requirements in multimedia applications and driver assistance systems, the sheer volume of communication data in queue is continu...
3867
0.0
Single Channel HDLC Controller
Inicore's iniHDLC family of High-Level Data Link Controller (HDLC) cores consist of a Receiver (FPR: From Primary Rate) and a Transmitter (TPR: To Pri...
3868
0.0
Single stage low noise amplifier from 2-6 GHz with flat gain, low Noise Figure, high isolation, stability.
RFLN04C is a single stage low noise amplifier with flat gain, low Noise Figure, high isolation, stability. The LNA is designed to operate from 2-6 GHz...
3869
0.0
PipelineZero 32-bit Embedded Processor
The BA20 is a small, ultra-low-power, and very efficient 32-bit processor. It is an excellent step up from the 8051 and other 8- and 16-bit microcontr...
3870
0.0
MIPI C-PHY 2.1 TX/RX, 6nm
InPsytech proudly presents our groundbreaking innovation, the MIPI C-PHY Ver2.1 IP, setting new standards in connectivity solutions. Designed to empow...
3871
0.0
MIPI C-PHY CSI-2 TX+ (Transmitter) IP in TSMC 40ULP
The MXL-CPHY-2p5G-CSI-2-TX+-T-40ULP is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY is configured as a MIPI Maste...
3872
0.0
MIPI C-PHY DSI RX (Transmitter/Host) IP in TSMC 22ULL
The MXL-CPHY-2p5G-DSI-RX-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...
3873
0.0
MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (N4C)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3874
0.0
MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes in GlobalFoundries (12nm)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3875
0.0
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in Samsung (SF2P)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3876
0.0
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes for TSMC 12FFCP
Synopsys’ integrated DesignWare C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and...
3877
0.0
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in Samsung (SF2P)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3878
0.0
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in Samsung (SF5A, SF4A) for Automotive
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3879
0.0
MIPI C-PHY v2.0 D-PHY v2.1 for TSMC N5A
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3880
0.0
MIPI C-PHY v2.0 D-PHY v2.1 RX 2 trios/2 Lanes in Samsung ST0 SF2A
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3881
0.0
MIPI C-PHY v2.0 D-PHY v2.1 RX 3 trios/4 Lanes in Samsung (SF2A, SF4A) for Automotive
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3882
0.0
MIPI C-PHY v2.0 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (N7, N5A, N3A)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3883
0.0
MIPI C-PHY v2.0 D-PHY v2.1 RX for GF 12LP+
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3884
0.0
MIPI C-PHY v2.0 D-PHY v2.1 RX for TSMC N6
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3885
0.0
MIPI C-PHY v2.0 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (N7) for Automotive
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3886
0.0
MIPI C-PHY v2.0 D-PHY v2.1 TX 3 trios/4 Lanes in Samsung (SF5A, SF4A) for Automotive
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3887
0.0
MIPI C-PHY v2.0 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (N7)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3888
0.0
MIPI C-PHY v2.0 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (N7, N6, N6C)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3889
0.0
MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP in TSMC 16FFC
The MXL-CDPHY-CSI-2-RX+-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
3890
0.0
MIPI C-PHY/D-PHY Combo CSI-2 TX (Transmitter) in TSMC 40ULP
The MXL-CDPHY-CSI-2-TX-T-40ULP is a high-frequency, low-power, low-cost, source-synchronous, physical layer supporting the MIPI Alliance Specification...
3891
0.0
MIPI C-PHY/D-PHY Combo CSI-2 TX (Transmitter) IP in TSMC 65LP
The MXL-CDPHY-CSI-2-TX-T-65LP is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY is configured as a MIPI Master supp...
3892
0.0
MIPI C-PHY/D-PHY Combo CSI-2 TX 3.5Gsps/trio in TSMC 28nm
The MXL-CDPHY-3p5G-CSI-2-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifi...
3893
0.0
MIPI C-PHY/D-PHY Combo CSI-2 TX 4.5Gsps/trio in TSMC 28nm
The MXL-CDPHY-4p5G-CSI-2-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifi...
3894
0.0
MIPI C-PHY/D-PHY Combo CSI-2 TX RX IP (3Gsps/3Gbps) on the TSMC N2 process
The MXL-CDPHY-3G-CSI-2-TX-RX-T-N02 is a high-frequency, lowpower, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...
3895
0.0
MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 3.5Gsps/2.5Gbps, 2T/2L
The MXL-CDPHY-CSI-2-TX+-40LP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification f...
3896
0.0
MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP in TSMC 40ULP
The MXL-CDPHY-CSI-2-TX+-40ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...
3897
0.0
MIPI C-PHY/D-PHY Combo DSI RX (Receiver) IP in TSMC 28HPC+
The MXL-CDPHY-DSI-RX-T-28HPC+ is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY is configured as MIPI Slave support...
3898
0.0
MIPI C-PHY/D-PHY Combo DSI TX (Transmitter) IP in TSMC 55G
The MXL-CDPHY-DSI-TX-T-55G is a high-frequency low-power, high-performance, physical Layer. The PHY is configured as a MIPI Master supporting display ...
3899
0.0
MIPI C-PHY/D-PHY Combo Universal IP in UMC 40LP
The MXL-CDPHY-UNIV-U-40LP is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY can be configured as a MIPI Master or M...
3900
0.0
MIPI C/D COMBO RX HS PHY UMC 28/22nm
Our silicon-proven MIPI C- and D-PHY combo Rx PHY is compliant with Camera Serial Interface (CSI) version 1.2, supporting D-PHY speeds up to 4.5 GHz (...