Design & Reuse
5517 IP
4051
0.0
UMC L28EHV 28nm Multi Phase DLL - 300MHz-1500MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4052
0.0
UMC L28EHV 28nm Multi Phase DLL - 600MHz-3000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4053
0.0
UMC L28EHV 28nm Spread Spectrum PLL - 131MHz-656MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4054
0.0
UMC L28EHV 28nm Spread Spectrum PLL - 262MHz-1310MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4055
0.0
UMC L28EHV 28nm Spread Spectrum PLL - 524MHz-2620MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4056
0.0
UMC L28EHV 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
4057
0.0
UMC L28EHVLVT 28nm Clock Generator PLL - 225MHz-1125MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4058
0.0
UMC L28EHVLVT 28nm Clock Generator PLL - 450MHz-2250MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4059
0.0
UMC L28EHVLVT 28nm Clock Generator PLL - 900MHz-4500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4060
0.0
UMC L28EHVLVT 28nm DDR DLL - 160MHz-800MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4061
0.0
UMC L28EHVLVT 28nm DDR DLL - 214MHz-1070MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4062
0.0
UMC L28EHVLVT 28nm DDR DLL - 338MHz-1690MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4063
0.0
UMC L28EHVLVT 28nm Deskew PLL - 225MHz-1125MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4064
0.0
UMC L28EHVLVT 28nm Deskew PLL - 450MHz-2250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4065
0.0
UMC L28EHVLVT 28nm Deskew PLL - 900MHz-4500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4066
0.0
UMC L28EHVLVT 28nm General Purpose PLL - 450MHz-2250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4067
0.0
UMC L28EHVLVT 28nm Multi Phase DLL - 225MHz-1125MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4068
0.0
UMC L28EHVLVT 28nm Multi Phase DLL - 450MHz-2250MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4069
0.0
UMC L28EHVLVT 28nm Multi Phase DLL - 900MHz-4500MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4070
0.0
UMC L28EHVLVT 28nm Spread Spectrum PLL - 196MHz-984MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4071
0.0
UMC L28EHVLVT 28nm Spread Spectrum PLL - 394MHz-1970MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4072
0.0
UMC L28EHVLVT 28nm Spread Spectrum PLL - 788MHz-3940MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4073
0.0
UMC L28EHVLVT 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
4074
0.0
UMC L28HLP 28nm Clock Generator PLL - 110MHz-550MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4075
0.0
UMC L28HLP 28nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4076
0.0
UMC L28HLP 28nm Clock Generator PLL - 440MHz-2200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4077
0.0
UMC L28HLP 28nm DDR DLL - 117MHz-585MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4078
0.0
UMC L28HLP 28nm DDR DLL - 156MHz-780MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4079
0.0
UMC L28HLP 28nm DDR DLL - 246MHz-1230MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4080
0.0
UMC L28HLP 28nm Deskew PLL - 110MHz-550MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4081
0.0
UMC L28HLP 28nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4082
0.0
UMC L28HLP 28nm Deskew PLL - 440MHz-2200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4083
0.0
UMC L28HLP 28nm General Purpose PLL - 220MHz-1100MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
4084
0.0
UMC L28HLP 28nm IoT PLL - 30MHz-550MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
4085
0.0
UMC L28HLP 28nm Multi Phase DLL - 110MHz-550MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4086
0.0
UMC L28HLP 28nm Multi Phase DLL - 220MHz-1100MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4087
0.0
UMC L28HLP 28nm Multi Phase DLL - 440MHz-2200MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4088
0.0
UMC L28HLP 28nm Spread Spectrum PLL - 192MHz-962MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4089
0.0
UMC L28HLP 28nm Spread Spectrum PLL - 384MHz-1920MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4090
0.0
UMC L28HLP 28nm Spread Spectrum PLL - 96MHz-481MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4091
0.0
UMC L28HLP 28nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
4092
0.0
UMC L28HPC 28nm Clock Generator PLL - 175MHz-875MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4093
0.0
UMC L28HPC 28nm Clock Generator PLL - 350MHz-1750MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4094
0.0
UMC L28HPC 28nm Clock Generator PLL - 700MHz-3500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4095
0.0
UMC L28HPC 28nm DDR DLL - 150MHz-750MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4096
0.0
UMC L28HPC 28nm DDR DLL - 200MHz-1000MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4097
0.0
UMC L28HPC 28nm DDR DLL - 316MHz-1580MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4098
0.0
UMC L28HPC 28nm Deskew PLL - 175MHz-875MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4099
0.0
UMC L28HPC 28nm Deskew PLL - 350MHz-1750MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4100
0.0
UMC L28HPC 28nm Deskew PLL - 700MHz-3500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...