1 44.0

CodaCache® Last Level Cache IP CodaCache is a configurable, standalone, non-coherent cache IP that delivers unique business value through its advanced last-level cache (LLC) archite...

2 0.0

FlexWay Interconnect IP FlexWay 5 from Arteris is an essential entry-level IP generator for cost-efficient, high-performance network-on-chip (NoC) designs. It revolutionizes ...

3 0.0

Smart Network-on-Chip (NoC) IP AI-Enhanced Automation for Smarter SoC Design FlexGen™ by Arteris redefines how SoC designers create Network-on-Chip IP by introducing cutting-edge...

4 0.0

CodaCache Last Level Cache IP CodaCache is a configurable, standalone, non-coherent cache IP that delivers unique business value through its advanced last-level cache (LLC) archite...

5 45.0

Magillem Connectivity System Integration Automation Magillem Connectivity is the centerpiece of a powerful, intuitive, single source of truth design environment. It delivers advanced functionalities to...

6 45.0

Ncore 3 Coherent Network-on-Chip (NoC) For scalable and area-efficient heterogeneous cache coherent systems. The Arteris Ncore Cache Coherent Interconnect IP offers unparalleled scalabil...

7 45.0

FlexNoC 5 Network-on-Chip (NoC) Arteris FlexNoC 5 network-on-chip (NoC) physically aware interconnect IP improves development time, performance, power consumption, and die size of sy...

8 44.0

FlexNoC 5 Option For Scalability and Performance Critical Systems Arteris IP FlexNoC Performance Option accelerates development of next-generation deep neural network (DNN) and machine learning systems. Automate and ...

9 44.0

FlexNoC Functional Safety (FuSa) Option helps meet up to ISO 26262 ASIL B and D requirements against random hardware faults. For complex SoCs in advanced process nodes, CPU duplication and memory protection logic are no longer sufficient to address all the metrics required t...

10 0.0

Magillem Registers System Integration Automation Cost-effective and scalable, Magillem Registers offers a memory map view of IPs and systems based on the IP-XACT standard. The Registers approach targ...

11 0.0

FlexNoC 5 Network-on-Chip (NoC) Arteris FlexNoC 5 network-on-chip (NoC) physically aware interconnect IP improves development time, performance, power consumption, and die size of sy...

12 0.0

FlexNoC Resilience Package For complex SoCs in advanced process nodes, CPU duplication and memory protection logic are no longer sufficient to address all the metrics required t...

13 0.0

Empowering Design Quality with Harmony Trace Harmony Trace by Arteris, the innovative Design Data Intelligence Solution for complex SoC and System-of-SoCs projects. Accelerate quality and functio...

14 200.0

UALink IP Solution with PHY, Controller and Verification IP The Synopsys UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Ac...

15 200.0

MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6 The MXL-CDPHY-6p0G-CSI-2-RX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...

16 200.0

MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5 The MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...

17 200.0

MIPI C-PHY/D-PHY Combo Universal IP (8.0Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC The MXL-CDPHY-UNIV-8p0G-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...

18 200.0

RISC V 32 bit Embedded General-Purpose CPU IP, Enhanced With L1 Cache, B/F Extensions, Zicbom, And Smepmp Security, Comparable To M33 TGE315 - A low-power, high-performance 32-bit RISC-V processor, enhanced with L1 cache, B/F extensions, Zicbom, and Smepmp security. Ideal for industr...

19 150.0

Synopsys 1.6T Ethernet MAC IP The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...

20 140.0

VIA PUF (vPUF) IP for roots of trust and security chips Learn more about physically unclonable functions (PUF) from ICTK (Kosdaq 456010). ICTK’s VIA PUF (vPUF) IP uses the unique via hole fingerprint in ea...

21 140.0

RISC-V 32-bit, 6-Stage Superscaler CPU IP With ASIL-B Automotive Safety Certification, Comparable To R5 TAE500 - A high-performance 32-bit RISC-V embedded CPU IP, supporting RV32GCB(P), Zicond, and Smepmp extensions. Designed for automotive applications,...

22 140.0

Intelligent Sensor and Power Management Platform of ASIC IP for Sensor, Power, and IoT Applications As falling silicon technology node-size continues to reduce the power consumption and physical space required for any given ASIC design, whole new emb...

23 120.0

12 bit 5Msps SAR ADC IP core Engineered for performance and efficiency, this 12-bit SAR ADC IP Core delivers up to 5 mega samples per second while consuming minimal power, making ...

24 120.0

PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC This Peripheral Component Interconnect Express (PCIe) x4 PHY is compliant with PCIe 4.0 Base Specification with support of PIPE 4.4 interface spec. Lo...

25 120.0

5G Ultra low power Sub-6 GHz RF Transceiver IP This is a 3GPP compliant 5G Sub-6GHz RF Transceiver IP optimized for cellular application. It integrates all the necessary RF/analog/mixed signal func...

26 120.0

Wi-Fi 802.11 ax/Wi-Fi 6 /Bluetooth LE v5.4/15.4-2.4GHz RF Transceiver IP for IOT Application in TSMC22 ULL Our IP is Fully compliant with 2.4GHz IEEE 802.11ax(WIFI 6) and Bluetooth standards, this WiFi 802.11 ax(WiFi ax)/Bluetooth LE v5.4/15.4, 2.4GHz RF Tr...

27 120.0

Silicon Proven 1G Ethernet PHY IP as Whitebox 1G Ethernet PHY IP Core is available for licensing as a Whitebox IP, with unlimited usage and full modification rights granted to the customer, ensuri...

28 120.0

MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 22 ULP C-PHY/D-PHY Combo in numerous process nodes at low cost and power. To accommodate a range of applications, users can set this Combo PHY in either D-PH...

29 120.0

RISC V 64 bit Application-Grade General-Purpose CPU IP, Comparable To A55 TGS500 - A high energy-efficient 64-bit RISC-V application-grade processor compliant with the RVA23 profile, supporting vector extensions and optional...

30 120.0

RISC-V 32-bit Embedded Functional Safety CPU IP, With ASIL-B, Comparable To M0+ TAE302- 32‑bit RISC‑V embedded functional safety processor, derived from the TGE302 and enhanced with Parity/ECC and Stack Pointer Monitor (SPM) modul...

31 120.0

Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP This Display Port v1.4 Rx PHY IP Core supports Channel capacity, offering programmable analog characteristics like CDR Bandwidth, Equalizer Strength, ...

32 120.0

Bluetooth - BLE v6.0 RF PHY IP in TSMC 22nm This BLE 6.0 RF IP, developed in TSMC 22nm, is designed for Bluetooth Low Energy technology, with a strong emphasis on channel sounding capabilities. ...

33 120.0

GNSS (GPS, Galileo, GLONASS, Beidou3, QZSS, SBAS) Ultra-low power RF Receiver IP This GNSS RF Receiver IP is silicon-proven in 22nm ULP process node, offers comprehensive support for all current satsatellite-based navigation system...

34 120.0

BT Dual Mode v6.0 RF PHY IP in TSMC 22nm with Channel sounding The Ultra-Low-Power DM RF transceiver IP in TSMC22 ULL is designed to meet 2.4 GHz standards like Bluetooth Classic (BR/EDR), Bluetooth Low Energy, 80...

35 110.0

Ethernet Enterprise Switch/Router IP Core - Efficient and Massively Customizable Packet Architects offers a series of high speed switching/routing IP cores developed using the unique FlexSwitch tool-chain. This allows us to provide...

36 102.0

MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 4.5Gsps/4.5Gbps The MXL-CDPHY-4p5G-CSI-2-TX+-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...

37 102.0

MIPI C-PHY/D-PHY Combo RX IP 4.5Gsps/4.5Gbps in TSMC N7 The MXL-CDPHY-4p5G-CSI-2-RX-T-N7FF is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specific...

38 102.0

MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5 The MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification fo...

39 102.0

Automotive MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5 The AUTO-MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...

40 102.0

Automotive MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5 The AUTO-MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...

41 100.0

1.6T Ethernet PCS IP The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...

42 100.0

1.6T Ethernet PCS IP based on the IEEE 802.3dj spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...

43 100.0

1.6T Ultra Ethernet IP Solution with PHY, Controller and Verification IP The Synopsys 1.6T Ultra Ethernet IP solution, consisting of 1.6T MAC and PCS multi-rate Ethernet controllers, silicon-proven 224G Ethernet PHY IP, and...

44 100.0

200G and 400G Ethernet PCS IP The Synopsys Ethernet 400G and 200G Physical Coding Sublayer (PCS) IP is compliant with the IEEE 802.3bs standard and provides a complete set of featu...

45 100.0

800G Ethernet PCS IP The Synopsys 800G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the 400G IEEE 802.3bs standard, provides a complete set of features enabl...

46 100.0

400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency ...

47 100.0

56G Serdes in 7nm bundled with PCie Gen 5 controller IP New IP for value conscious designers....

48 100.0

PCIe 7.0 PHY IP supporting the latest features of the evolving PCIe 7.0 specification to enable 128 GT/s and up to x16 lane configurations The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...

49 100.0

PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency Multiprotocol low latency, low power SERDES IP....

50 100.0

UCIe PHY & D2D Adapter Neuron IP’s UCIe PHY & D2D Adapter IP portfolio includes 32Gbps UCIe-Advanced (UCIe-A) & Standard (UCIe-S) cores as per the latest UCIe v1.1 specifica...