201 12.0

WiSUN Sub-GHz 433, 868, 915MHz Transceiver IP The ShortLink Sub-GHz Transceiver RF IP 'SL40LP_Sub1GHzTrx_2' is a complete mixed signal RF IP for the 433, 868 and 915MHz frequency bands. It is comp...

202 12.0

Sub-GHz 433MHz RF Transceiver IP The ShortLink Sub-GHz Transceiver RF IP 'SL150_433MHzTrx_1' is a complete mixed signal RF IP for the 433MHz frequency band. It offers a data rate of 1...

203 11.0

MIPI C-PHY DSI TX (Transmitter/Host) IP in TSMC 22ULL The MXL-CPHY-2p5G-DSI-TX-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...

204 11.0

MIPI C-PHY/D-PHY Combo 2-Lane CSI-2 TX+ IP in TSMC 40ULP The MXL-CDPHY-2L-CSI-2-TX+-40ULP is a high-frequency, low-power, low-cost, sourcesynchronous, physical Layer supporting the MIPI Alliance Specificatio...

205 11.0

MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 3.5Gsps/2.5Gbps The MXL-CD-PHY-CSITX+-ST-28FDSOI is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...

206 11.0

MIPI C-PHY/D-PHY Combo DSI RX (Receiver) IP in TSMC 22ULP The MXL-CDPHY-DSI-RX-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification f...

207 11.0

MIPI C-PHY/D-PHY Combo Universal IP, 4.5Gsps/4.5Gbps in TSMC 22ULP The MXL-CD-PHY-UNIV-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification fo...

208 11.0

MIPI D-PHY CSI-2 TX+ (Transmitter) IP in TSMC 22ULL The MXL-DPHY-CSI-2-TX+-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification...

209 11.0

MIPI D-PHY IP 4.5Gbps in TSMC N7 The MXL-DPHY-DSI-TX-T-N07 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for ...

210 11.0

MIPI D-PHY Universal IP in TSMC 28HPC+ The MXL-DPHY-UNIV-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...

211 11.0

MIPI D-PHY Universal IP in UMC 28HPC+ The MXL-DPHY-UNIV-U-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for...

212 11.0

MIPI M-PHY HS-G4 IP (M-PHY v4.1) in TSMC 40G The MXL-MIPI-M-PHY is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI Alliance Standard for M-PHY. The IP can be used ...

213 11.0

Automotive MIPI D-PHY CSI-2 RX+ (Receiver) IP in UMC 40ULP The AUTO-MXL-DPHY-CSI-2-RX+ is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification for...

214 11.0

Automotive MIPI D-PHY CSI-2 RX+ IP in TSMC 28HPC+ The AUTO-MXL-DPHY-CSI-RX+-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...

215 10.0

H.264 Compression Video Over IP - HD Encoder Subsystem This Video Over IP Subsystem integrates H.264 compression Transport Stream and RTP/UDP/IP encapsulation to enable the rapid development of complete vi...

216 10.0

H.264 Decompression Video Over IP – HD Decoder Subsystem This Video Over IP Subsystem integrates H.264 Decompression, Transport Stream and RTP/UDP/IP de-capsulation to enable the rapid development of complet...

217 10.0

64x8 Bits OTP (One-Time Programmable) IP, UM- 55nm ULP standard CMOS core logic Process The AT64X8U55ULP6AA is organized as a 64-word by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 55nm ULP standard ...

218 10.0

64x8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18μm XH018 Modular Mixed Signal Process The ATO00064X8XH180TG33NA is organized as a 64-bit by 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in X-FA- 0.18μm ...

219 10.0

256x8 Bits OTP (One-Time Programmable) IP, TSM- 22ULP 0.8V/1.8V process The AT256X8T22ULP6AA is organized as 256 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- 22nm ULP CMOS...

220 10.0

768x39 Bits OTP (One-Time Programmable) IP, TSM- 55ULP 0.9V–1.2V / 2.5V Process The ATO0768X39TS055ULP4NA is organized as 768x39 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 55nm LP 1.2V/2....

221 10.0

16Kx33 Bits OTP (One-Time Programmable) IP, TSM- 40LP 1.1V/2.5V Process The ATO016KX33TS040LLP7ZA is organized as 16K-bits by 33 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ...

222 10.0

H8/300 CPU IP ( 8-bit CPU IP ) H8/300 is a high speed 8-bit CPU with an internal 16-bit architecture. H8/300 CPU IP is compatible with H8S CPU subsystem IP (H8S C200) on system, bus...

223 10.0

H8S CPU subsystem (H8S C200) IP H8S is a high speed 16-bit CPU with an internal 32-bit architecture, which is upward-compatible with H8/300 and H8/300H CPUs on an object level. This ...

224 10.0

H8SX CPU subsystem (H8SX C3000) IP H8SX is a high speed 32-bit CPU, which is upward-compatible with H8/300, H8/300H and H8S CPUs on an object level. This subsystem IP supports many and ...

225 10.0

Camera ISP IP (Competitive Performance) - ZELKOVA Zelkova is a comprehensive ISP IP that includes many functionalities for image processing applications. It is optimized for low light environment appl...

226 10.0

Camera ISP IP (High Performance) - METASEQUOIA METASEQUOIA is a comprehensive ISP IP that includes many functionalities for image processing. It is optimized for high resolution and low light envir...

227 10.0

WAVE521, H.265, HEVC, H.264, AVC video encoder IP for 4K WAVE521 is a 4K multi-format encoder IP to support both HEVC/H.265 and AVC/H.264 video formats. It is capable of encoding HEVC Main/Main 10/Main Sti...

228 10.0

WAVE521CL, H.265, HEVC, H.264, AVC video codec IP for 4K low-cost WAVE521CL is a low-cost 4K codec IP to support HEVC/H.265 and AVC/H.264 video standards. The codec IP is capable of encoding 4K60fps@500MHz with HEV...

229 10.0

WAVE521L, H.265, HEVC, H.264, AVC video encoder IP for 4K low-cost WAVE521L is a low-cost 4K encoder IP to support HEVC/H.265 and AVC/H.264 video standards. The IP core provides high-performance encode capability up t...

230 10.0

WAVE633LC, H.265, HEVC, H.264, AVC, video codec IP for 4K low-cost WAVE633LC is a 4K multi-standard video codec IP that supports HEVC/H.265 and AVC/H.264 video codec standards. WAVE633LC targets Low Cost, so B-frame i...

231 10.0

HBM3 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM3 standard Synopsys HBM3 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM3 standard. The controller interoperates wit...

232 10.0

HBM3 PHY IP at 7nm OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

233 10.0

PCI Express - Configurable PCI Express 4.0 IP The Renesas PCIe 4.0 Dual Mode Link Controller IP is compliant with the "PCI Express (PCIe) 4.0 Base Specification". This IP supports the major functi...

234 10.0

SD 4.1 SDIO 4.1 Host Controller IP The SD 4.1/SDIO 4.1 IP from Arasan Chip Systems is a highly integrated host controller IP solution that supports two key memory card I/O technologies:...

235 10.0

GDDR6 PHY IP for 12nm OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

236 10.0

Secure-IC's Securyzr™ Inline Decrypter IP Core The Inline Decrypter IP Core enables on-the-fly execution of encrypted code from Flash. It is often used to protect the source code from decompiling o...

237 10.0

VESA DSC Encoder and Decoder IP Solutions Synopsys VESA Display Stream Compression (DSC) Encoder and Decoder IP provides a video compression solution for up to 10K ultra-high-definition displa...

238 10.0

JESD204D - Succesfully Taped out, Silicon Agnostic IP core The JESD204D Controller IP is based on the recently released D revision of the JEDEC standard for Serial Interface for Data Converters. The JESD204D I...

239 10.0

DesignWare Library contains the essential infrastructure IP for design and verification The DesignWare Library contains the essential infrastructure IP for design and verification including datapath components, AMBA On-Chip Bus and microc...

240 10.0

UFS Host Controller IP Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

241 10.0

Die-to-Die Controller IP The Synopsys Die-to-Die Controller IP, optimized for latency, bandwidth, power and area, enables efficient inter-die connectivity in server, AI accele...

242 10.0

Digital Physical Unclonable Function (PUF) IP Our Digital PUF IP is a digital version of our quantum-based PUF IP (see QDID). The Logic-based Digital PUF IP is a strong hardware root-of-trust for ...

243 10.0

MIPI DSI-2 Transmitter Interface IP MIPI DSI-2 (Display Serial Interface) defines an interface between a peripheral device (camera) and host processor (application engine) for mobile dev...

244 10.0

MIPI I3C Controller and Target fully featured IP solution The MIPI I3C Controller IP is a highly optimized and technology-agnostic implementation of the MIPI I3C v.1.1.1 standard targeting both ASIC and F...

245 10.0

Direct Memory Access DMA Controller IP Core The DMA_CTRL core implements a low-power, single-channel Direct Memory Access (DMA) controller that is used to transfer data across a bus to and from ...

246 10.0

Visibility Improver IP “LucidEye” improves the visibility of unclear images such as those deteriorated due to weather conditions (snow, haze, or fog), and dark images due t...

247 10.0

4Kx16 Bits OTP (One-Time Programmable) IP, UM- 110 nm 1.2V/3.3V L110AE Process The AT4K16U110MAE0DA is organized as a 4K-bits by 16 one-time programmable memory. This is a kind of non-volatile memory fabricated in UM- L110AE proc...

248 10.0

4Kx32 Bits OTP (One-Time Programmable) IP, TSM- 40nm ULP 1.1V/2.5V Process The AT4K32T40ULP7ZC is organized as 4K-bits by 32 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ULP stand...

249 10.0

4Kx8 Bits OTP (One-Time Programmable) IP, GLOBA-FOUNDR---® 22nm FDX 0.8V/1.8V Process The AT4K8G22FDX0AA is organized as a 4K-bits by 8 one-time programmable memory. This is a kind of non-volatile memory fabricated in GLOBA-FOUNDR---® ...

250 10.0

8Kx8 Bits OTP (One-Time Programmable) IP, VI- 0.15µm 1.8V/5V BCD GIII Process The AT8K8V150BCD0DB is organized as an 8K-bit by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in VI- 0.15μm BCD GII...