301 8.0

ARINC 429 IP Core ARINC 429 IP Core implements ARINC 429 standard. IP Core contains Rx and Tx processing blocks, Controller Block, Internal Memory and External Memory I...

302 8.0

ARINC 429 IP Core ARINC 429 IP Core implements ARINC 429 standard. IP Core contains Rx and Tx processing blocks, Controller Block, Internal Memory and External Memory I...

303 8.0

TSMC CLN7FF HBM2E PHY IP This datasheet describes GUC HBM (High Bandwidth Memory) PHY IP, which could be integrated with HBM memory controller to provide HBM functionality. Th...

304 8.0

Sub-GHz 433, 868, 915MHz IEEE 802.15.4 RF Transceiver IP The ShortLink Sub-GHz Transceiver RF IP 'SL40LP_Sub1GHzTrx_1' is a complete mixed signal RF IP for the 433, 868 and 915MHz frequency bands. It is comp...

305 7.5

LCD Panel Controller IP (Exclusively for Turnkey ASIC design; not for standalone licensing) This is an LCD Panel Controller IP that can drives multiple LCD panels available in the market. It is configurable to support 1/3-bias, 1/2 bias LCDs....

306 7.5

Temperature Sensor IP (Exclusively for Turnkey ASIC design; not for standalone licensing) This is a Temperature Sensor IP. It measures temperature variations within the IC and converts them in to digital form. The processor in the system ca...

307 7.5

Clock Management IP (Exclusively for Turnkey ASIC design; not for standalone licensing) This is a Clock Management IP that can drive 3 different output clocks. These 3 different clocks are required for any simple Digital or Mixed Signal A...

308 7.5

Power Management IP (Exclusively for Turnkey ASIC design; not for standalone licensing) This is a Power Management IP that can take 3 different input supplies and can drive 4 different output power domains. These 4 different power domains...

309 7.0

Falcon IP Core Falcon IP Core is a post-quantum digital signature algorithm (DSA). It is currently under development. It is going to be compliant with Falcon specifi...

310 7.0

Camera LDC (De-warp) IP - GINKGO GINKGO is an Lens Distortion Correction IP capable of up to 192° angle correction. It comes with factors that can adjust zoom and un-distortion streng...

311 7.0

Camera Scaler IP - DSCALE DSCALE is an IP that reduces the input image to a specified output size. DSCALE can simultaneously process one input image into four different reduce...

312 7.0

ECDSA IP Core ECDSA IP Cores perform digital signature generation and verification in compliance with the Elliptic Curve Digital Signature Algorithm (ECDSA) specifi...

313 7.0

AES GCM IP Core AES GCM IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Advanced Encryption Standard (AES) specification in "FIPS 197"...

314 7.0

AES IP Core AES IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Advanced Encryption Standard (AES) specification in "FIPS 197". Th...

315 7.0

SHA3 IP Core SHA3 IP Cores perform cryptographic hashing in compliance with the SHA-3 (Secure Hash Algorithm 3) specifications defined in 'FIPS 202'. This standard...

316 7.0

Dilithium IP Core Dilithium IP Core is a post-quantum digital signature algorithm (DSA). It currently supports Sign and Verify functions, with key generation functional...

317 7.0

Ultra Compact Ethernet TSN End Station Controller IP for Automotive The Ethernet TSN End Station Controller IP family from Comcores is a comprehensive hardware and software solution for automotive applications. The so...

318 7.0

DRBG IP Core DRBG IP Cores perform deterministic random bit generation in compliance with the standards and guidelines defined in 'NIST SP 800-90A'. This standard ...

319 7.0

TRNG IP Core TRNG IP Cores perform true random number generation in compliance with the standards and guidelines defined in 'NIST SP 800-90B'. This standard specif...

320 7.0

RSA IP Core RSA IP Cores perform digital signature generation and verification in compliance with the RSA (Rivest-Shamir-Adleman) Digital Signature Algorithm spec...

321 7.0

RSA Keygen IP Core RSA Keygen IP Cores perform key generation in compliance with the RSA Key Pair Generation specifications defined in 'FIPS 186'. This standard specifie...

322 7.0

DSC decoder IP DSC decoder IP is compliant with standard VESA Display Stream Compression version 1.1/1.2/1.2a....

323 7.0

KYBER IP Core Kyber IP is a core designed for Kyber post-quantum Key Encapsulation Mechanism (KEM). It currently supports the Encapsulation and Decapsulation functi...

324 6.0

I2C Master/Slave Controller Core IP I2C Master/Slave Controller core implements a bidirectional serial interface compatible with the NXP’s I2C bus specification and supports all transfer...

325 6.0

Camera Demosaicing IP - DAISY (RCCC) The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...

326 6.0

Camera Demosaicing IP - LOTUS (RCCB) The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...

327 6.0

Camera Demosaicing IP - ROSE (RGB-IR) The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...

328 6.0

Warping Engine IP block for image transformation, HUDs and fish-eye correction TES Warping Engine is a specialized IP core for arbitrary high-performance re-mapping of bitmaps from memory-to-memory or memory-to-stream. Applicatio...

329 6.0

Bluetooth BLE v5.3 PHY Silicon Proven Platinum IP icyTRX is a silicon-proven, ultra-low-power RF transceiver IP designed for Bluetooth Low Energy (BLE), IEEE 802.15.4 (e.g., ZigBee), and proprietary w...

330 6.0

Bluetooth Dual Mode PHY IP V5.4 Silicon Proven The icyTRX-DM is a Bluetooth® 5.4 Dual-Mode RF transceiver IP optimized for ultra-low power wireless communication. It supports both Bluetooth Classic...

331 6.0

DPI video output to system memory capture IP block The Virtual Display IP is designed to enable automated testing of the output of display controllers with DPI-2 output interface such as the TES CDC (C...

332 6.0

USB based High Speed System Debug IP Architecture Independent Design Supports any AMBA AHB based System Easily portable to other buses such as Avalon Standard USB 2.0 interface to th...

333 6.0

AXI- Interconnect : Advanced Extensible Interface Bus IP The AMBA AXI protocol is targeted at high-performance, high-frequency system designs and includes a number of features that make it suitable for high-...

334 5.0

M31 ADC / Temp. Sensor IP in 12nm, 14nm, 22nm Process The M31 SAR ADC provides a rich portfolio with a resolution from 10 to 12-bit, maximum speed up to 2.5MSPS, and supports input types of single-ended o...

335 5.0

M31 Digital PLL IP in 3nm, 5nm, 6nm, 7nm, 12nm, 16nm, 22nm,28nm,40nm M31 Digital PLL is a core-power only programmable phase-locked loop (PLL) for frequency synthesis. It supports multiple modes of operation for several...

336 5.0

M31 DisplayPort RX IP in 6/7nm, 22nm M31 DisplayPort RX IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. DisplayPort RX supp...

337 5.0

CAN 2.0, CAN FD - Developed as ISO26262-10 Safety Element out of Context (ISO26262 soft IP SEooC, ASIL-B ready design) Introducing DCD’s Ingenious CAN FD IP Core: Empowering Engineers with Unparalleled Flexibility. When it comes to seamlessly infusing cutting-edge C...

338 5.0

MAPI, High resolution Image Processing IP such as CSC, Scaler, FBC Chips&Media MAPI is a high-resolution Image Processing IP. It can scale up/down and color space conversion on a frame-by-frame basis with various inpu...

339 5.0

SATA Device IP Core (1.5, 3.0, 6.0 Gbps) The Serial ATA Device Controller IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage ...

340 5.0

WAVE511, H.265, HEVC, H.264, AVC, video decoder IP for 4K Chips&Media WAVE511 is AVC.H.264 and HEVC/H.265 combined multi-standard video decoder IP, optimally designed with streamlined single-CORE to support 4...

341 5.0

WAVE512, H.265, HEVC, H.264, AVC, AVS2 video decoder IP for 4K Chips&Media’s WAVE512 is one of the most advanced hardware video decoder IP core which supports the next generation HEVC(High-Efficiency Video Coding)...

342 5.0

WAVE515, H.265, HEVC, H.264, AVC, VP9, AVS2 video decoder IP for 4K Chips&Media’s WAVE515 is one of the most advanced hardware video decoder IP core which supports the next generation HEVC(High-Efficiency Video Coding)...

343 5.0

WAVE541C, H.265, HEVC, H.264, AVC dual-core video codec IP for 8K WAVE541C is a dual-CORE codec IP, optimally architected for real-time encoding or decoding video at 8Kp60 in either HEVC or H.264 standards. SoCs po...

344 5.0

WAVE624, AV1 video encoder IP for 4K WAVE624 is a 4K video encoder HW IP that supports AV1 video codec standards. It provides 4K60fps@500MHz real-time encoding performance with a single-c...

345 5.0

WAVE663, H.265, HEVC, H.264, AVC, dual-core video encoder IP for 4K WAVE663 is a 4K/8K multi-standard video encoder HW IP that supports HEVC/H.265 and AVC/H.264 video codec standards. It provides 4K120fps@500MHz or 8K6...

346 5.0

WAVE673, H.265, HEVC, H.264, AVC, dual-core video codec IP for 4K WAVE673 is a 4K/8K multi-standard video codec HW IP that supports HEVC/H.265 and AVC/H.264 video codec standards. It provides 8K60fps@1GHz, 4K240fps@1...

347 5.0

WAVE677, AV1, H.265, HEVC, H.264, AVC, dual-core video codec IP for 8K WAVE677 is a 4K/8K multi-standard video codec IP that supports AV1, HEVC/H.265, and AVC/H.264 video codec standard. It provides 8K60fps@1GHz(4K240fps@...

348 5.0

WAVE677DV PX4, AV1, H.265, HEVC, H.264, AVC, VP9 dual core video codec IP for 8K with YUV422, 444 support WAVE677DV PX4 is a 4K/8K multi-standard video codec HW IP that supports AV1, HEVC/H.265, AVC/H.264, and VP9 standards. It provides 4K120fps@500MHz, 8K...

349 5.0

WAVE677DV, AV1, H.265, HEVC, H.264, AVC, VP9 dual-core video codec IP for 8K WAVE677DV is a 4K/8K multi-standard video codec HW IP that supports AV1, HEVC/H.265, AVC/H.264, and VP9 video codec standards. It provides 4K120fps@50...

350 5.0

CCSDS AR4JA LDPC Decoder & Encoder IP Core AR4JA LDPC decoder is a configurable design that allows runtime configuration for decoding different code rates (i.e., 1/2, 2/3 and 3/4). To obtain hi...