Design & Reuse
6105 IP
751
0.0
32x1 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V Logic Process
The ATO00032X1MX180LB52NC is organized as a 32-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in MXI- 0.18μm l...
752
0.0
32x1 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V Logic Process
The ATO00032X1MX180LB52ND is organized as a 32-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in MXI- 0.18μm l...
753
0.0
64x8 Bits OTP (One-Time Programmable) IP, Ca-Sem- 0.18μm 1.8V/3.3V Logic Process
The ATO00064X8CA180TGO3NA is organized as a 64-bit by 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in Ca-Sem- 0.18μ...
754
0.0
64x8 Bits OTP (One-Time Programmable) IP, Ne-chi- 0.15μm 3.3V Logic Processes
The ATO00064X8NX150FPS3NA is organized as a 64x8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in Ne-chi- 0.15μm 3.3V ...
755
0.0
95 dB of SNR, Pure logic stereo audio DAC with patented PLL-less feature in TSMC 130G
loDAC-95-LO-pl.TSMC.130.G is a set of Virtual Components comprised of a fully digital core with Delta-sigma - PWM to provide a stereo digital-to-analo...
756
0.0
CAN Controller
CAN Controller...
757
0.0
PCIe GEN6 PHY
Designed for next-generation PCIe systems, the PCIe GEN6 PHY IP supports data rates up to 64GT/s per lane with advanced PAM4 signaling. It ensures eff...
758
0.0
HDTV H.264/AVC Video Encoder with Compressed Frame Store
The OL_H264E-CFS core is a hardware implementation of the H.264 video compression algorithm. The core accepts up to the highest resolution HDTV video ...
759
0.0
AES 256 encryption IP core
Logic Fruit’s AES 256 encryption IP core implements Rijndael encoding and decoding. It works with 256-bit blocks and is programmed to work with 256-bi...
760
0.0
DES Cryptoprocessor
This core is a fully compliant implementation of the DES encryption algorithm. Both encryption and decryption are supported. ECB, CBC and triple DES v...
761
0.0
JESD204B Transmitter and Receiver
Logic fruit Technologies has designed JESD204B RTL IP. It can support increased lane rates upto 12.5Gbps for higher bandwidth applications. It can be ...
762
0.0
JESD204C Transmitter and Receiver
Logic fruit Technologies has designed JESD204C RTL IP to support increased lane rates upto 32Gbps for higher bandwidth applications. This IP can be co...
763
0.0
1G UDP IP Stack
Logic Fruit’s 1G UDP IPⓇ is specialized in data transmission and reception over the internet. The UDP Protocol helps to establish a low-latency and lo...
764
0.0
Phase-frequency detector in CMOS logic
The phase-frequency detector (PFD) consists of a signal level converter from differential reduced swing ECL to single-ended full swing CMOS signal and...
765
0.0
Phase-frequency detector in ECL logic
The phase-frequency detector (PFD) consists of 2 D-trigger with reset from external circuit, performed in ECL logic and multiplexer, which allow to sw...
766
0.0
MIL1553B IP Core
MIL-STD-1553B defines specifications for terminal device operation and coupling, word structure and format, messaging protocol and electrical characte...
767
0.0
MIL1553B IP Core
MIL-STD-1553B defines specifications for terminal device operation and coupling, word structure and format, messaging protocol and electrical characte...
768
0.0
LIN Master Slave Controller
Local Interconnect Network (LIN) is a broadcasting, Single Master, and Multi Slave (up to 16) communication protocol designed to support those feature...
769
0.0
Discrete Cosine Transform OL_DCT
This core can perform the two dimensional Discrete Cosine Transform (DCT) and its inverse (IDCT) on an 8x8 block of samples. The simple, fully synchro...
770
0.0
DisplayPort Transmitter & Receiver
Logic Fruit Technologies has designed & implemented DISPLAY PORT Transmitter & Receiver IP Cores supporting multiple line rates up to 8.1Gbps. The IP ...
771
0.0
FlexRay Controller
Logic Fruit Technologies has designed FlexRay RTL IP Core, supporting data rate up to 10 Mbps. FlexRay, a high-speed protocol for advanced vehicles...
772
0.0
OL_H264E-CFS HDTV H.264/AVC Video Encoder with Compressed Frame Store
The OL_H264E-CFS core is a hardware implementation of the H.264 video compression algorithm. The core accepts up to the highest resolution HDTV video ...
773
0.0
On-Chip Logic Analyzer
The LOGAN - On-chip Logic Analyzer IP core can trace and display on-chip signals. When armed, the on-chip logic analyzers stores the traced signals in...
774
0.0
Logic Fruit Technologies - SoC design services
Based in Gurgaon, India, Logic Fruit Technologies designs and deploys embedded solutions for customers around the world. The company has specific expe...
775
0.0
FPGA Proven PCIe GEN6 Controller
PCIe GEN6 Controller IP Delivers data speed up to 64GT/s (Gigatransfers per second) per lane. Multi-channel packet processing and enhanced RAS capabil...
776
0.0
CPRI Master and Slave
CPRI is a high-speed serial interface for network radio equipment controllers (REC) to receive and provide data to remote Radio Equipment (RE)....
777
0.0
ARINC 818 Transmitter & Receiver
Logic Fruit Technologies has designed & implemented ARINC 818-2 Transmitter & Receiver IP Core supporting multiple line rates up to 8.5 Gbps....
778
0.0
ETHERNET 10G MAC
The 10G Ethernet MAC core is a thoroughly verified Ethernet Media Access Controller function that interfaces with physical layer devices in an Etherne...
779
0.0
Multi-Channel HDTV H.264/AVC Limited Baseline Video Decoder
The OL_H264MCLD core is a hardware implementation of the H.264 baseline video compression algorithm. The core decodes a bitstream produced by the OLH2...
780
0.0
Multichannel module supporting ARINC429 Receiver/Transmitter
ARINC 429 IP Core is a multichannel module with support for virtually any number of transmitters and Receivers....
781
200.0
MACsec Engine, 1G to 100G Single-Port
The MACsec-IP-160 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line ra...
782
200.0
MACsec Engine, 1G to 25G, Full Duplex, Integrated
As part of Rambus' award-winning silicon Intellectual Property (IP) product portfolio, the EIP-165 is a high-performance, split ingress/egress in-line...
783
200.0
MACsec Engine, 1G to 50G Single-Port, with TSN support
The MACsec-IP-161 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line ra...
784
200.0
MACsec Engine,10M-25G Single-Port, ISO 26262 Compliant with xMII Interface
The MACsec-IP-362 consists of the Rambus MACsec-IP-162 (a single-port line-rate MACsec engine with FIFO interface and optional preemption) and xMII in...
785
200.0
MACsec Engine,10M-50G Single-Port with xMII Interface and TSN Support
The MACsec-IP-361 is a plug-and-play solution for adding MACsec on the xMII side of an Ethernet subsystem. It is ISO 26262 ASIL-B Ready certified and ...
786
200.0
UALink IP Solution with PHY, Controller and Verification IP
The Synopsys UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Ac...
787
200.0
HBM4 Memory Controller
The Rambus HBM4 Controller Core is designed for use in applications requiring high memory bandwidth and low latency including AI/ML, HPC, advanced dat...
788
200.0
CC-6xx CryptoManager Core
The Rambus CryptoManager Core CC-6xx is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-6xx. The CC-6xx products are designed...
789
200.0
CC-7xx CryptoManager Core
The automotive-grade Rambus CryptoManager Core CC-7xx family is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-7xx. The CC-7...
790
200.0
ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine
The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...
791
200.0
ICE-IP-358 High-speed XTS-GCM Multi Stream Inline Cipher Engine, DPA resistant
The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...
792
200.0
PCIe 7.0 Controller
The Rambus PCI Express® (PCIe®) 7.0 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 6...
793
200.0
GDDR7 Memory Controller
The Rambus GDDR7 controller core is designed for use in applications requiring high memory throughput including graphics, high performance computing (...
794
200.0
CH-6xx CryptoManager Hub
The Rambus CryptoManager Hub CH-6xx is the next generation of flexible and configurable cryptographic family of accelerator cores. CH-6xx designs targ...
795
200.0
CH-7xx CryptoManager Hub
The automotive-grade CryptoManager Hub (CMH) from Rambus is the next-generation of flexible and configurable cryptographic family of accelerator cores...
796
200.0
MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6
The MXL-CDPHY-6p0G-CSI-2-RX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...
797
200.0
MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5
The MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...
798
200.0
MIPI C-PHY/D-PHY Combo Universal IP (8.0Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC
The MXL-CDPHY-UNIV-8p0G-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
799
200.0
Compute Express Link (CXL) 3.1 Controller
The Rambus Compute Express Link® (CXL®) 3.1 controller is a parameterizable design for ASIC and FPGA implementations. It leverages the Rambus PCIe® 6....
800
200.0
LPDDR Combo Controller - LPDDR4X/4 & LPDDR5T/5X/5
The Rambus LPDDR4 and LPDDR5 combo controller core is designed for use in applications requiring high memory throughput at low power including mobile,...