Design & Reuse
Catalog of SIP Cores
System on Chip design resources
6237 IP
851
120.0
6-12-bit, Gen Analog-to-Digital Converter (ADC) IP block
Alphacore offers proven 6-12-bit analog to digital converters (ADC) intellectually property (IP) design blocks with the industry's best low-power and ...
852
120.0
4-16-bit, Gen Digital-to-Analog Converter (DAC) IP block
Alphacore offers proven 4-16-bit digital-to-analog converters (DAC) intellectually property (IP) design blocks with the industry's best low-power and ...
853
102.0
MIPI C-PHY/D-PHY Combo CSI-2 RX IP 4.5Gsps/4.5Gbps in TSMC N7
The MXL-CDPHY-4p5G-CSI-2-RX-T-N7FF is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specific...
854
102.0
MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 4.5Gsps/4.5Gbps
The MXL-CDPHY-4p5G-CSI-2-TX+-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...
855
102.0
MIPI C-PHY/D-PHY Combo DSI TX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The MXL-CDPHY-4p5G-DSI-TX+-T-5N is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
856
102.0
Automotive MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5
The AUTO-MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...
857
102.0
Automotive MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The AUTO-MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...
858
100.0
7-bit, 64 GSPS ADC Ultra Low Power
The ODT-ADS-7B64G-3 is an ultra-high-bandwidth time-interleaved ADC designed in a 3nm CMOS process. This 7-bit, 64GSPS ADC supports ac-coupled inpu...
859
100.0
1.6T Ethernet PCS IP
The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...
860
100.0
1.6T Ethernet PCS IP based on the IEEE 802.3dj spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications
The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...
861
100.0
1.6T Ultra Ethernet IP Solution with PHY, Controller and Verification IP
The Synopsys 1.6T Ultra Ethernet IP solution, consisting of 1.6T MAC and PCS multi-rate Ethernet controllers, silicon-proven 224G Ethernet PHY IP, and...
862
100.0
200G and 400G Ethernet PCS IP
The Synopsys Ethernet 400G and 200G Physical Coding Sublayer (PCS) IP is compliant with the IEEE 802.3bs standard and provides a complete set of featu...
863
100.0
800G Ethernet PCS IP
The Synopsys 800G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the 400G IEEE 802.3bs standard, provides a complete set of features enabl...
864
100.0
100MHz-13.5GHz, Gen Phase-Locked Loop (PLL) IP block
Alphacore offers proven 100MHz to 13.5GHz Phase-Locked Loop (PLL) intellectually property (IP) design blocks with the industry's best core offerings w...
865
100.0
10G-100G MACsec Security Module for Ethernet
Data security between Ethernet-connected devices is expanding due to multiple factors: exponential growth of data containing sensitive and private inf...
866
100.0
112G Ethernet PHY in TSMC (N7, N6, N5, N3P)
The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
867
100.0
224G Ethernet PHY in TSMC (N3P, N2P)
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
868
100.0
224G-LR SerDes PHY for TSMC
224G-LR SerDes PHY enables 1.6T and 800G networks The ever-increasing bandwidth in high-performance computing (HPC) applications is driving the rap...
869
100.0
CAN FD Bus Controller
CAN FD Bus Controller IP is an extension of Classical CAN Bus IP that addresses the increasing need for higher data rates and larger payload sizes. It...
870
100.0
Scalable, On-Die Voltage Regulation for High Current Applications
The Aeonic Power™ HC is a high-current, on-die voltage regulation solution that delivers local, distributed power, enabling fine-grained Dynamic Volta...
871
100.0
PCIe 5.0 Integrity and Data Encryption Security Module
PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...
872
100.0
PCIe 6.0 Integrity and Data Encryption Security Module
PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...
873
100.0
PCIe 6.0 PHY in Samsung (SF5A, SF4X, SF2)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...
874
100.0
PCIe 6.0 PHY in TSMC (N6, N5, N4P, N4C, N3P, N3E)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...
875
100.0
PCIe 7.0 PHY in TSMC (N5, N4P, N4C, N3P, N3C, N2P)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
876
100.0
PCIe 7.0 PHY IP supporting the latest features of the evolving PCIe 7.0 specification to enable 128 GT/s and up to x16 lane configurations
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
877
100.0
UCIe PHY & D2D Adapter
Neuron IP’s UCIe PHY & D2D Adapter IP portfolio includes 32Gbps UCIe-Advanced (UCIe-A) & Standard (UCIe-S) cores as per the latest UCIe v1.1 specifica...
878
100.0
UCIe-A PHY for Advanced Package (x64) in TSMC (N7, N6, N5, N3)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...
879
100.0
UCIe-S PHY for Standard Package (x16) in Samsung (SF5A, SF4X, SF2)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...
880
100.0
UCIe-S PHY for Standard Package (x16) in TSMC (N7, N6, N4P, N5, N3)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...
881
100.0
SD 4.1 / SDIO 4.0 / eMMC 5.1 Host Controller
Arasan Chip Systems’ eMMC 5.0 / SD3.0 Host Controller IP (3MCR) is a highly integrated host controller IP solution that supports three key memory and ...
882
100.0
Adaptive Clock Generation Module for DVFS and Droop Response
The Movellus™ Aeonic Generate AWM3 high-performance clock generation IP product is part of the Aeonic digital IP product family. Designed for Droop Mi...
883
100.0
HDCP 2.3 Embedded Security Modules on DisplayPort/USB Type-C
The Synopsys Embedded Security Modules (ESMs) for High- Bandwidth Digital Content Protection 2.3 (HDCP 2.3) are complete solutions that provide design...
884
100.0
Ceva-Waves Bluetooth 6.0 Low Energy Baseband Controller / Link Layer, software and profiles
Ceva-Waves Bluetooth Low Energy IP is a comprehensive and flexible solution for integration into SoCs/ASSPs. It has been qualified for Bluetooth Core ...
885
100.0
1G-25G MACsec Security Module
Data security between Ethernet-connected devices is expanding due to multiple factors: exponential growth of data containing sensitive and private inf...
886
100.0
The Synopsys 1.6T Ethernet MAC IP is based on IEEE 802.3-2018 spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications
The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...
887
100.0
MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Arasan's MIPI C-PHY is designed and compliant with latest MIPI C-Phy Standards. The MIPI C-PHY V1.2 improves throughput over a bandwidth-limited ch...
888
100.0
MIPI CSI-2 controller Receiver v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.
The Arasan MIPI CSI-2 Receiver IP Core functions as a MIPI Camera Serial Interface Receiver, between a peripheral device (Camera module) and a host pr...
889
100.0
MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.2 improves throughput over a bandwidth limited channel, allowing more data without in...
890
100.0
MIPI D-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Arasan delivers you MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete G...
891
100.0
MIPI DSI Receiver Controller v1.3
The Arasan DSI Device Controller IP is designed to provide MIPI compliant high speed serial connectivity for mobile display modules with Type 1 to 4 a...
892
100.0
MIPI DSI Transmit Controller v1.3
The Arasan DSI Transmit Controller IP is designed to provide MIPI DSI 1.3 compliant high speed serial connectivity for mobile host processors using 1 ...
893
100.0
Globalfoundries 12nm MIPI D-PHY V1.2@2.5GHz
Arasan Chip Systems announces the immediate availability of its MIPI D-PHY(SM) Globalfoundries 12nm FinFET process nodes. Arasan's D-PHY Global Foun...
894
100.0
Embedded Security Modules for HDCP 2.3 on HDMI IP
The Synopsys Embedded Security Modules (ESMs) for High- Bandwidth Digital Content Protection 2.3 (HDCP 2.3) are complete solutions that provide design...
895
100.0
On-Die PDN Analyzer for Transistor-Level Visibility and Telemetry
The Aeonic Insight™ PDN IQ is an in-situ, on-die PDN (Power Delivery Network) analyzer providing transistor level PDN telemetry at nanosecond scale. T...
896
100.0
ONFI 4.2 Controller
Arasan Chip System’s (ACS) Open NAND Flash Interface (ONFI) Host Controller is designed to provide the next generation of high speed interaction with ...
897
100.0
Universal Chiplet Interconnect Express (UCIe) Controller
Synopsys UCIe Controller IP is comprised of the Die-to-Die Adapter layer and Protocol layer for widely used protocols such as PCI Express and CXL. The...
898
100.0
Inline Memory Encryption (IME) Security Module for DDR/LPDDR
As our connected world expands, the technological advances in high-performance computing (HPC) are reshaping system-on-chip (SoC) designs to address t...
899
100.0
Integrated Droop Response System
Industry 1st Integrated Turnkey Solution for Droop and DVFS Response Enabling Silicon Monitoring and Health Analytics with Precise Run-Time Droop R...
900
100.0
Low Noise, On-Die, Localized Voltage Regulation
The Aeonic Power™ LN device is built to support die-to-die interconnects (e.g. UCIe) for the chiplet ecosystem, amongst other applications. Simplifyin...